kern: io: Add initial PCI CAM driver

Signed-off-by: Ian Moffett <ian@osmora.org>

2 files changed, 186 insertions, 0 deletions

diff --git a/src/sys/include/io/pci/cam.h b/src/sys/include/io/pci/cam.h
new file mode 100644
index 0000000..817556e
--- /dev/null
+++ b/src/sys/include/io/pci/cam.h
@@ -0,0 +1,106 @@
+/*
+ * Copyright (c) 2025 Ian Marco Moffett and L5 engineers
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _PCI_CAM_H_
+#define _PCI_CAM_H_ 1
+
+#include <sys/types.h>
+#include <io/pci/pci.h>
+
+#define PCIREG_VENDOR_ID  0x00  /* 16 bits */
+#define PCIREG_DEVICE_ID  0x02  /* 16 bits */
+#define PCIREG_CLASSREV   0x08  /* 32 bits */
+#define PCIREG_HDRTYPE    0x0e  /* 8 bits */
+#define PCIREG_BAR0       0x10  /* 32 bits */
+#define PCIREG_BAR1       0x14  /* 32 bits */
+#define PCIREG_BUSES      0x18  /* 24 bits */
+#define PCIREG_BAR2       0x18  /* 32 bits */
+#define PCIREG_BAR3       0x1C  /* 32 bits */
+#define PCIREG_BAR4       0x20  /* 32 bits */
+#define PCIREG_BAR5       0x24  /* 32 bits */
+#define PCIREG_IRQLINE    0x3C  /* 8 bits */
+#define PCIREG_CAPPTR     0x34  /* 8 bits */
+#define PCIREG_CMDSTATUS  0x04  /* command (15:0), status (31:16) */
+
+/* Macros to extract PCIREG_CLASSREV bits */
+#define PCIREG_CLASS(CLASSREV) (CLASSREV >> 24)
+#define PCIREG_SUBCLASS(CLASSREV) ((CLASSREV >> 16) & 0xFF)
+#define PCIREG_REVID(CLASSREV) (CLASSREV & 0xFF)
+#define PCIREG_PROGIF(CLASSREV) ((CLASSREV >> 8) & 0xFF)
+
+/* Macros to extract PCI_BUSES bits */
+#define PCIREG_PRIBUS(BUSES) (BUSES & 0xFF)
+#define PCIREG_SECBUS(BUSES) ((BUSES >> 8) & 0xFF)
+#define PCIREG_SUBBUS(BUSES) ((BUSES >> 16) & 0xFF)
+
+/* Macros to extract PCIREG_CMDSTATUS bits */
+#define PCIREG_COMMAND(CMDSTATUS) (CMDSTATUS & 0xFFFF)
+#define PCIREG_STATUS(CMDSTATUS) (CMDSTATUS >> 16)
+
+/* PCI command register bits */
+#define PCI_IO_SPACE        BIT(0)  /* Respond to I/O space accesses */
+#define PCI_MEM_SPACE       BIT(1)  /* Respond to mem space accesses */
+#define PCI_BUS_MASTERING   BIT(2)  /* Enable bus mastering */
+#define PCI_INT_DISABLE     BIT(10) /* Interrupt disable */
+
+/* PCI status register bits */
+#define PCI_STATUS_CAPLIST  BIT(4)
+#define PCI_STATUS_66MHZ    BIT(5)
+
+/* Capability IDs */
+#define PCI_CAP_MSI     0x05
+#define PCI_CAP_MSIX    0x11
+
+/* PCI BAR defines */
+#define PCI_BAR_TYPE(BAR) ((BAR >> 1) & 3)
+#define PCI_BAR_32(BAR) (PCI_BAR_TYPE(BAR) == 0x0)
+#define PCI_BAR_64(BAR) (PCI_BAR_TYPE(BAR) == 0x2)
+
+/* PCI header types */
+#define PCI_HDRTYPE_NORMAL 0x00
+#define PCI_HDRTYPE_BRIDGE 0x01
+
+/*
+ * Configuration Access Mechanism callbacks for
+ * read and write operations.
+ */
+struct cam_hook {
+    void(*cam_writel)(struct pci_device *dp, uint32_t offset, pcival_t v);
+    pcireg_t(*cam_readl)(struct pci_device *dp, uint32_t offset);
+};
+
+/*
+ * Initialize the CAM hooks to contain valid pointers
+ * to callbacks.
+ *
+ * @chp: CAM hooks to initialize
+ */
+int pci_cam_init(struct cam_hook *chp);
+
+#endif  /* !_PCI_CAM_H_ */
diff --git a/src/sys/include/io/pci/pci.h b/src/sys/include/io/pci/pci.h
new file mode 100644
index 0000000..a636ce7
--- /dev/null
+++ b/src/sys/include/io/pci/pci.h
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2025 Ian Marco Moffett and L5 engineers
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _PCI_PCI_H_
+#define _PCI_PCI_H_ 1
+
+#include <sys/types.h>
+
+/* PCI specific types */
+typedef uint32_t pcireg_t;
+typedef uint32_t pcival_t;
+
+/*
+ * Represents a device attached to the PCI
+ * bus
+ *
+ * @bus: Bus number of device
+ * @slot: Slot number of device
+ * @func: Function number of device
+ */
+struct pci_device {
+    uint16_t bus;
+    uint8_t slot;
+    uint8_t func;
+};
+
+/*
+ * Read from a specific register on a specific PCI
+ * enabled device.
+ *
+ * @dp: Device to read from
+ * @reg: Offset of desired register
+ *
+ * Returns the 32-bit register value on success
+ */
+pcireg_t pci_readl(struct pci_device *dp, pcireg_t reg);
+
+/*
+ * Write a value to a specific register on a specific
+ * PCI enabled device.
+ *
+ * @dp: Device to write to
+ * @reg: Offset of the desired register
+ * @v: 32-bit value to be written
+ */
+void pci_writel(struct pci_device *dp, pcireg_t reg, pcival_t v);
+
+/*
+ * Initialize the root bus and enumerate attached
+ * devices.
+ */
+void pci_init_bus(void);
+
+#endif  /* !PCI_PCI_H_ */