kern: io: Add initial PCI CAM driver

Signed-off-by: Ian Moffett <ian@osmora.org>

6 files changed, 415 insertions, 0 deletions

diff --git a/src/sys/arch/amd64/boot/boot_chip.c b/src/sys/arch/amd64/boot/boot_chip.c
index 76753d5..18ab2df 100644
--- a/src/sys/arch/amd64/boot/boot_chip.c
+++ b/src/sys/arch/amd64/boot/boot_chip.c
@@ -36,6 +36,7 @@
 #include <machine/ioapic.h>
 #include <machine/tss.h>
 #include <machine/gdt.h>
+#include <io/pci/pci.h>
 #include <stdbool.h>
 
 static void
@@ -52,6 +53,7 @@ chipset_init(void)
 
     uart_init();
     i8259_disable();
+    pci_init_bus();
 }
 
 /*
diff --git a/src/sys/arch/amd64/io/pci/cam.c b/src/sys/arch/amd64/io/pci/cam.c
new file mode 100644
index 0000000..fae9a16
--- /dev/null
+++ b/src/sys/arch/amd64/io/pci/cam.c
@@ -0,0 +1,142 @@
+/*
+ * Copyright (c) 2025 Ian Marco Moffett and L5 engineers
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Description: PCI(e) CAM/ECAM driver
+ * Author: Ian Marco Moffett
+ */
+
+#include <sys/types.h>
+#include <sys/errno.h>
+#include <sys/param.h>
+#include <sys/cdefs.h>
+#include <io/pci/cam.h>
+#include <io/pci/pci.h>
+#include <machine/pio.h>
+
+/*
+ * PCI compatibility configuration access
+ * method.
+ *
+ * @PCI_CAM_ADDR: Address window
+ * @PCI_CAM_DATA: Data register
+ *
+ * Writing to the address register results in the host
+ * bridge latching the data register until the next write.
+ *
+ * -- CONFIG ADDRESS FORMAT --
+ *
+ * bits 1:0   -> zero
+ * bits 7:2   -> register offset
+ * bits 10:8  -> function
+ * bits 15:11 -> device number
+ * bits 23:16 -> bus number
+ * bits 30:24 -> reserved
+ * bit  31    -> ENABLE
+ */
+#define PCI_CAM_ADDR 0xCF8
+#define PCI_CAM_DATA 0xCFC
+
+/*
+ * Compute the configuration space address of a specific
+ * device at a specific register offset
+ *
+ * @dev: Device to get address base of
+ * @offset: Desired register offset
+ *
+ * Returns a 32-bit PCI configuration space address
+ */
+static inline uint32_t
+pci_conf_addr(struct pci_device *dev, uint32_t offset)
+{
+    return BIT(31)             |
+           (offset & ~3)       |
+           (dev->func << 8)    |
+           (dev->slot << 11)   |
+           (dev->bus << 16);
+}
+
+/*
+ * Perform a legacy PCI CAM read which interacts
+ * with the lower 256 bytes of the configuration
+ * space. Upon receiving the read to the PCI_CAM_ADDR
+ * the PCI host bridge latches its PCI_CAM_DATA register
+ * at which written data is delegated to the target device.
+ *
+ * @dp: Target device to read
+ * @offset: Register offset to read from
+ *
+ * Returns a 32-bit value read from the device
+ * register.
+ */
+static pcireg_t
+pci_cam_readl(struct pci_device *dp, uint32_t offset)
+{
+    uint32_t conf_addr;
+
+    if (dp == NULL) {
+        return 0;
+    }
+
+    /* Latch the data register to this device */
+    conf_addr = pci_conf_addr(dp, offset);
+    outl(PCI_CAM_ADDR, conf_addr);
+
+    /* Actually read from the device */
+    return inl(PCI_CAM_DATA);
+}
+
+static void
+pci_cam_writel(struct pci_device *dp, uint32_t offset, pcival_t v)
+{
+    uint32_t conf_addr;
+
+    if (dp == NULL) {
+        return;
+    }
+
+    /* Latch the data register to this device */
+    conf_addr = pci_conf_addr(dp, offset);
+    outl(PCI_CAM_ADDR, conf_addr);
+
+    /* Write the data to the target device */
+    outl(PCI_CAM_DATA, v);
+}
+
+int
+pci_cam_init(struct cam_hook *chp)
+{
+    if (chp == NULL) {
+        return -EINVAL;
+    }
+
+    chp->cam_writel = pci_cam_writel;
+    chp->cam_readl = pci_cam_readl;
+    return 0;
+}
diff --git a/src/sys/include/io/pci/cam.h b/src/sys/include/io/pci/cam.h
new file mode 100644
index 0000000..817556e
--- /dev/null
+++ b/src/sys/include/io/pci/cam.h
@@ -0,0 +1,106 @@
+/*
+ * Copyright (c) 2025 Ian Marco Moffett and L5 engineers
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _PCI_CAM_H_
+#define _PCI_CAM_H_ 1
+
+#include <sys/types.h>
+#include <io/pci/pci.h>
+
+#define PCIREG_VENDOR_ID  0x00  /* 16 bits */
+#define PCIREG_DEVICE_ID  0x02  /* 16 bits */
+#define PCIREG_CLASSREV   0x08  /* 32 bits */
+#define PCIREG_HDRTYPE    0x0e  /* 8 bits */
+#define PCIREG_BAR0       0x10  /* 32 bits */
+#define PCIREG_BAR1       0x14  /* 32 bits */
+#define PCIREG_BUSES      0x18  /* 24 bits */
+#define PCIREG_BAR2       0x18  /* 32 bits */
+#define PCIREG_BAR3       0x1C  /* 32 bits */
+#define PCIREG_BAR4       0x20  /* 32 bits */
+#define PCIREG_BAR5       0x24  /* 32 bits */
+#define PCIREG_IRQLINE    0x3C  /* 8 bits */
+#define PCIREG_CAPPTR     0x34  /* 8 bits */
+#define PCIREG_CMDSTATUS  0x04  /* command (15:0), status (31:16) */
+
+/* Macros to extract PCIREG_CLASSREV bits */
+#define PCIREG_CLASS(CLASSREV) (CLASSREV >> 24)
+#define PCIREG_SUBCLASS(CLASSREV) ((CLASSREV >> 16) & 0xFF)
+#define PCIREG_REVID(CLASSREV) (CLASSREV & 0xFF)
+#define PCIREG_PROGIF(CLASSREV) ((CLASSREV >> 8) & 0xFF)
+
+/* Macros to extract PCI_BUSES bits */
+#define PCIREG_PRIBUS(BUSES) (BUSES & 0xFF)
+#define PCIREG_SECBUS(BUSES) ((BUSES >> 8) & 0xFF)
+#define PCIREG_SUBBUS(BUSES) ((BUSES >> 16) & 0xFF)
+
+/* Macros to extract PCIREG_CMDSTATUS bits */
+#define PCIREG_COMMAND(CMDSTATUS) (CMDSTATUS & 0xFFFF)
+#define PCIREG_STATUS(CMDSTATUS) (CMDSTATUS >> 16)
+
+/* PCI command register bits */
+#define PCI_IO_SPACE        BIT(0)  /* Respond to I/O space accesses */
+#define PCI_MEM_SPACE       BIT(1)  /* Respond to mem space accesses */
+#define PCI_BUS_MASTERING   BIT(2)  /* Enable bus mastering */
+#define PCI_INT_DISABLE     BIT(10) /* Interrupt disable */
+
+/* PCI status register bits */
+#define PCI_STATUS_CAPLIST  BIT(4)
+#define PCI_STATUS_66MHZ    BIT(5)
+
+/* Capability IDs */
+#define PCI_CAP_MSI     0x05
+#define PCI_CAP_MSIX    0x11
+
+/* PCI BAR defines */
+#define PCI_BAR_TYPE(BAR) ((BAR >> 1) & 3)
+#define PCI_BAR_32(BAR) (PCI_BAR_TYPE(BAR) == 0x0)
+#define PCI_BAR_64(BAR) (PCI_BAR_TYPE(BAR) == 0x2)
+
+/* PCI header types */
+#define PCI_HDRTYPE_NORMAL 0x00
+#define PCI_HDRTYPE_BRIDGE 0x01
+
+/*
+ * Configuration Access Mechanism callbacks for
+ * read and write operations.
+ */
+struct cam_hook {
+    void(*cam_writel)(struct pci_device *dp, uint32_t offset, pcival_t v);
+    pcireg_t(*cam_readl)(struct pci_device *dp, uint32_t offset);
+};
+
+/*
+ * Initialize the CAM hooks to contain valid pointers
+ * to callbacks.
+ *
+ * @chp: CAM hooks to initialize
+ */
+int pci_cam_init(struct cam_hook *chp);
+
+#endif  /* !_PCI_CAM_H_ */
diff --git a/src/sys/include/io/pci/pci.h b/src/sys/include/io/pci/pci.h
new file mode 100644
index 0000000..a636ce7
--- /dev/null
+++ b/src/sys/include/io/pci/pci.h
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2025 Ian Marco Moffett and L5 engineers
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _PCI_PCI_H_
+#define _PCI_PCI_H_ 1
+
+#include <sys/types.h>
+
+/* PCI specific types */
+typedef uint32_t pcireg_t;
+typedef uint32_t pcival_t;
+
+/*
+ * Represents a device attached to the PCI
+ * bus
+ *
+ * @bus: Bus number of device
+ * @slot: Slot number of device
+ * @func: Function number of device
+ */
+struct pci_device {
+    uint16_t bus;
+    uint8_t slot;
+    uint8_t func;
+};
+
+/*
+ * Read from a specific register on a specific PCI
+ * enabled device.
+ *
+ * @dp: Device to read from
+ * @reg: Offset of desired register
+ *
+ * Returns the 32-bit register value on success
+ */
+pcireg_t pci_readl(struct pci_device *dp, pcireg_t reg);
+
+/*
+ * Write a value to a specific register on a specific
+ * PCI enabled device.
+ *
+ * @dp: Device to write to
+ * @reg: Offset of the desired register
+ * @v: 32-bit value to be written
+ */
+void pci_writel(struct pci_device *dp, pcireg_t reg, pcival_t v);
+
+/*
+ * Initialize the root bus and enumerate attached
+ * devices.
+ */
+void pci_init_bus(void);
+
+#endif  /* !PCI_PCI_H_ */
diff --git a/src/sys/io/pci/pci.c b/src/sys/io/pci/pci.c
new file mode 100644
index 0000000..864e4c3
--- /dev/null
+++ b/src/sys/io/pci/pci.c
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2025 Ian Marco Moffett and L5 engineers
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/types.h>
+#include <sys/param.h>
+#include <sys/cdefs.h>
+#include <sys/panic.h>
+#include <sys/syslog.h>
+#include <io/pci/pci.h>
+#include <io/pci/cam.h>
+
+static struct cam_hook cam;
+
+/*
+ * Read from a specific register
+ */
+pcireg_t
+pci_readl(struct pci_device *dp, pcireg_t reg)
+{
+    if (dp == NULL) {
+        return 0;
+    }
+
+    return cam.cam_readl(dp, reg);
+}
+
+/*
+ * Write to a specific register
+ */
+void
+pci_writel(struct pci_device *dp, pcireg_t reg, uint32_t v)
+{
+    if (dp == NULL) {
+        return;
+    }
+
+    return cam.cam_writel(dp, reg, v);
+}
+
+void
+pci_init_bus(void)
+{
+    int error;
+
+    error = pci_cam_init(&cam);
+    if (error < 0) {
+        printf("pci_init_bus: pci_cam_init() returned %d\n", error);
+        panic("pci_init_bus: failed to init CAM\n");
+    }
+}
diff --git a/src/sys/os/os_stub.c b/src/sys/os/os_stub.c
index a7498e0..f78df68 100644
--- a/src/sys/os/os_stub.c
+++ b/src/sys/os/os_stub.c
@@ -30,9 +30,18 @@
 #include <sys/cdefs.h>
 #include <sys/cpuvar.h>
 #include <sys/syslog.h>
+#include <io/pci/cam.h>
 
 __weak void
 bsp_ap_startup(void)
 {
     printf("bsp_ap_startup: unimplemented\n");
 }
+
+__weak int
+pci_cam_init(struct cam_hook *chp)
+{
+    (void)chp;
+    printf("pci_cam_init: unimplemented\n");
+    return 0;
+}