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authorIan Moffett <ian@osmora.org>2025-10-12 19:17:05 -0400
committerIan Moffett <ian@osmora.org>2025-10-12 19:17:05 -0400
commitc8a06a547449f8326102c43a1c63dfcd80baef44 (patch)
tree720961f938f274f4f5932441a7a7f53976cf576e
parentf81ee3217a2c391fcaf4cf60d52afe09ef7c98b5 (diff)
docs: Introduce operand specifiers
Signed-off-by: Ian Moffett <ian@osmora.org>
-rw-r--r--README.md15
1 files changed, 15 insertions, 0 deletions
diff --git a/README.md b/README.md
index d102bd3..420f4a5 100644
--- a/README.md
+++ b/README.md
@@ -194,6 +194,21 @@ mov x1, #3
/* Iff x1 - x1 != 0, x1 equals 2 */
```
+### Operand specifier
+
+Some opcodes require an operand specifier after them
+to indicate whether or not the second operand [OP2] is
+a register or an immediate, for example:
+
+```
+ADD 0b1 DEST, SRC, IMM_OP
+ADD 0b0 DEST, SRC_REG, REG_OP
+```
+
+A value of 0b1 indicates an immediate value is used for the second
+operand (``IMM_OP``) and a value of 0b0 indicates a register is used for
+the second operand (``REG_OP``).
+
### Opcode list
- `NOP`: `0x00`