From c8a06a547449f8326102c43a1c63dfcd80baef44 Mon Sep 17 00:00:00 2001
From: Ian Moffett <ian@osmora.org>
Date: Sun, 12 Oct 2025 19:17:05 -0400
Subject: docs: Introduce operand specifiers

Signed-off-by: Ian Moffett <ian@osmora.org>
---
 README.md | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/README.md b/README.md
index d102bd3..420f4a5 100644
--- a/README.md
+++ b/README.md
@@ -194,6 +194,21 @@ mov x1, #3
 /* Iff x1 - x1 != 0, x1 equals 2 */
 ```
 
+### Operand specifier
+
+Some opcodes require an operand specifier after them
+to indicate whether or not the second operand [OP2] is
+a register or an immediate, for example:
+
+```
+ADD 0b1 DEST, SRC, IMM_OP
+ADD 0b0 DEST, SRC_REG, REG_OP
+```
+
+A value of 0b1 indicates an immediate value is used for the second
+operand (``IMM_OP``) and a value of 0b0 indicates a register is used for
+the second operand (``REG_OP``).
+
 ### Opcode list
 
 - `NOP`: `0x00`
-- 
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