diff options
Diffstat (limited to 'src/sys/arch/amd64')
-rw-r--r-- | src/sys/arch/amd64/boot/boot_chip.c | 4 | ||||
-rw-r--r-- | src/sys/arch/amd64/boot/boot_gdt.c | 5 | ||||
-rw-r--r-- | src/sys/arch/amd64/cpu/cpu_conf.c | 15 |
3 files changed, 17 insertions, 7 deletions
diff --git a/src/sys/arch/amd64/boot/boot_chip.c b/src/sys/arch/amd64/boot/boot_chip.c index 2ff122c..76753d5 100644 --- a/src/sys/arch/amd64/boot/boot_chip.c +++ b/src/sys/arch/amd64/boot/boot_chip.c @@ -61,8 +61,10 @@ static void init_tss(struct pcore *pcore) { struct tss_desc *desc; + struct mdcore *mdcore; - desc = (struct tss_desc *)&g_gdt_data[GDT_TSS_INDEX]; + mdcore = &pcore->md; + desc = (struct tss_desc *)&mdcore->gdt[GDT_TSS_INDEX]; write_tss(pcore, desc); tss_load(); } diff --git a/src/sys/arch/amd64/boot/boot_gdt.c b/src/sys/arch/amd64/boot/boot_gdt.c index 2c1ada6..64b3f2b 100644 --- a/src/sys/arch/amd64/boot/boot_gdt.c +++ b/src/sys/arch/amd64/boot/boot_gdt.c @@ -91,8 +91,3 @@ struct gdt_entry g_gdt_data[GDT_ENTRY_COUNT] = { /* Verify that the GDT is of the correct size */ __static_assert(sizeof(g_gdt_data) == (8 * GDT_ENTRY_COUNT)); - -const struct gdtr g_gdtr = { - .limit = sizeof(g_gdt_data) - 1, - .offset = (uintptr_t)&g_gdt_data[0] -}; diff --git a/src/sys/arch/amd64/cpu/cpu_conf.c b/src/sys/arch/amd64/cpu/cpu_conf.c index 5eb1cbe..e462ef3 100644 --- a/src/sys/arch/amd64/cpu/cpu_conf.c +++ b/src/sys/arch/amd64/cpu/cpu_conf.c @@ -34,6 +34,7 @@ #include <machine/trap.h> #include <machine/lapic.h> #include <machine/gdt.h> +#include <string.h> /* * Initialize interrupt vectors @@ -58,8 +59,20 @@ init_vectors(void) void cpu_conf(struct pcore *pcore) { + struct mdcore *mdcore; + struct gdtr *gdtr; + + /* Copy the template GDT */ + mdcore = &pcore->md; + memcpy(mdcore->gdt, &g_gdt_data, sizeof(g_gdt_data)); + + /* Set up the GDTR */ + gdtr = &mdcore->gdtr; + gdtr->offset = (uintptr_t)&mdcore->gdt[0]; + gdtr->limit = sizeof(g_gdt_data) - 1; + /* We use %GS to store the processor */ - gdt_load(); + gdt_load(&mdcore->gdtr); pcore->self = pcore; wrmsr(IA32_GS_BASE, (uintptr_t)pcore); |