kern: pci: Handle base address registers (BARs)

This commit handles base address registers by storing them in a bar
array within the PCI device structure. We also introduced a helper
header to perform operations with BARs such as getting the length of
their underlying region

Signed-off-by: Ian Moffett <ian@osmora.org>

4 files changed, 148 insertions, 0 deletions

diff --git a/src/sys/arch/amd64/io/pci/bar.c b/src/sys/arch/amd64/io/pci/bar.c
new file mode 100644
index 0000000..d3cfd0b
--- /dev/null
+++ b/src/sys/arch/amd64/io/pci/bar.c
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2025 Ian Marco Moffett and L5 engineers
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Description: PCI base address register helpers
+ * Author: Ian Marco Moffett
+ */
+
+#include <sys/types.h>
+#include <sys/errno.h>
+#include <sys/panic.h>
+#include <io/pci/bar.h>
+
+/*
+ * Get the size of a BAR
+ */
+ssize_t
+pci_bar_size(struct pci_device *dev, uint8_t bar)
+{
+    uint32_t reg_tmp, reg;
+    uint8_t barreg = pci_get_barreg(bar);
+
+    if (dev == NULL) {
+        return -EINVAL;
+    }
+
+    /*
+     * A trick we can do to find the length of the BAR defined
+     * by the device is to see how many bits it is capable of
+     * decoding for a BAR then invert the mask as log2(length)
+     * bits must be unset.
+     */
+    reg_tmp = pci_readl(dev, barreg);
+    pci_writel(dev, barreg, 0xFFFFFFFF);
+    reg = pci_readl(dev, barreg);
+    reg = ~reg + 1;
+
+    /* Restore and return the length */
+    pci_writel(dev, barreg, reg_tmp);
+    return reg;
+}
diff --git a/src/sys/include/io/pci/bar.h b/src/sys/include/io/pci/bar.h
new file mode 100644
index 0000000..6bb4367
--- /dev/null
+++ b/src/sys/include/io/pci/bar.h
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2025 Ian Marco Moffett and L5 engineers
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _PCI_BAR_H_
+#define _PCI_BAR_H_ 1
+
+#include <sys/types.h>
+#include <sys/cdefs.h>
+#include <io/pci/pci.h>
+#include <io/pci/cam.h>
+
+/*
+ * Convert a BAR number to BAR register offset
+ *
+ * @bar: Bar number
+ *
+ * Returns a register offset of the desired BAR on success,
+ * otherwise a value of 0 to indicate failure
+ */
+__always_inline static inline uint8_t
+pci_get_barreg(uint8_t bar)
+{
+    switch (bar) {
+    case 0: return PCIREG_BAR0;
+    case 1: return PCIREG_BAR1;
+    case 2: return PCIREG_BAR2;
+    case 3: return PCIREG_BAR3;
+    case 4: return PCIREG_BAR4;
+    case 5: return PCIREG_BAR5;
+    default: return 0;
+    }
+}
+
+/*
+ * Get the number of bytes a BAR region covers
+ *
+ * @dev: Device of BAR to check
+ * @bar: BAR number of BAR to check
+ *
+ * Returns the number of bytes the BAR region spans on success,
+ * otherwise a less than zero value on failure.
+ */
+ssize_t pci_bar_size(struct pci_device *dev, uint8_t bar);
+
+#endif  /* !_PCI_BAR_H_ */
diff --git a/src/sys/include/io/pci/pci.h b/src/sys/include/io/pci/pci.h
index 9184c00..fedb0d5 100644
--- a/src/sys/include/io/pci/pci.h
+++ b/src/sys/include/io/pci/pci.h
@@ -62,6 +62,7 @@ typedef uint32_t pcival_t;
  * @func: Function number of device
  * @vendor: Vendor ID
  * @device: Device ID
+ * @bar: Base address registers
  */
 struct pci_device {
     uint16_t bus;
@@ -71,6 +72,7 @@ struct pci_device {
     uint8_t subclass;
     uint16_t vendor;
     uint16_t device;
+    uint32_t bar[6];
     TAILQ_ENTRY(pci_device) link;
 };
 
diff --git a/src/sys/io/pci/pci.c b/src/sys/io/pci/pci.c
index af5c113..b785764 100644
--- a/src/sys/io/pci/pci.c
+++ b/src/sys/io/pci/pci.c
@@ -142,6 +142,14 @@ pci_register_dev(struct pci_device *dev)
     dev->class = class;
     dev->subclass = subclass;
 
+    /* Set up base address registers */
+    dev->bar[0] = pci_readl(dev, PCIREG_BAR0);
+    dev->bar[1] = pci_readl(dev, PCIREG_BAR1);
+    dev->bar[2] = pci_readl(dev, PCIREG_BAR2);
+    dev->bar[3] = pci_readl(dev, PCIREG_BAR3);
+    dev->bar[4] = pci_readl(dev, PCIREG_BAR4);
+    dev->bar[5] = pci_readl(dev, PCIREG_BAR5);
+
     /*
      * Log out the BDF notation as well as vendor,
      * and logical slot ID.