kern/amd64: isa: Add PS/2 keyboard prototype

Signed-off-by: Ian Moffett <ian@osmora.org>

2 files changed, 221 insertions, 0 deletions

diff --git a/src/sys/arch/amd64/isa/i8042.c b/src/sys/arch/amd64/isa/i8042.c
new file mode 100644
index 0000000..fbea435
--- /dev/null
+++ b/src/sys/arch/amd64/isa/i8042.c
@@ -0,0 +1,142 @@
+/*
+ * Copyright (c) 2025 Ian Marco Moffett and L5 engineers
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/syslog.h>
+#include <os/module.h>
+#include <os/clkdev.h>
+#include <os/spinlock.h>
+#include <machine/intr.h>
+#include <machine/i8042var.h>
+#include <machine/pio.h>
+#include <stdbool.h>
+
+
+static struct clkdev *clk;
+static struct spinlock lock;
+
+/*
+ * Character table for scancode conversion
+ */
+static char keytab[] = {
+    '\0', '\x1B', '1', '2', '3', '4', '5', '6', '7', '8', '9', '0',
+    '-', '=', '\b', '\t', 'q', 'w', 'e', 'r', 't', 'y', 'u', 'i',
+    'o', 'p', '[', ']', '\n', '\0', 'a', 's', 'd', 'f', 'g', 'h',
+    'j', 'k', 'l', ';', '\'', '`', '\0', '\\', 'z', 'x', 'c', 'v',
+    'b', 'n', 'm', ',', '.',  '/', '\0', '\0', '\0', ' '
+};
+
+/*
+ * Write a byte to the i8042
+ */
+static void
+i8042_write(bool is_cmd, uint8_t v)
+{
+    uint8_t port, status = 0xFF;
+
+    /* Wait until the input buffer empties */
+    while (ISSET(status, I8042_IBUFF)) {
+        status = inb(I8042_STATUS);
+        clk->msleep(5);
+    }
+
+    port = is_cmd ? I8042_CMD : I8042_DATA;
+    outb(port, v);
+}
+
+/*
+ * Read a byte from the i8042
+ */
+static uint8_t
+i8042_read(void)
+{
+    uint8_t status = 0x00;
+
+    while (!ISSET(status, I8042_OBUFF)) {
+        status = inb(I8042_STATUS);
+        clk->msleep(5);
+    }
+
+    clk->msleep(5);
+    return inb(I8042_DATA);
+}
+
+/*
+ * IRQ 1 handler
+ */
+static int
+i8042_irq(struct intr_hand *hp)
+{
+    uint8_t scancode;
+
+    spinlock_acquire(&lock);
+    scancode = i8042_read();
+    if (!ISSET(scancode, 0x80)) {
+        printf("%c", keytab[scancode]);
+    }
+    spinlock_release(&lock);
+    return 1;
+}
+
+/*
+ * Initialize i8042 interrupts (IRQ 1)
+ */
+static void
+i8042_init_intr(void)
+{
+    struct intr_hand hand = {
+        .hand = i8042_irq,
+        .name = "i8042-port0",
+        .irq = 1
+    };
+
+    intr_register(&hand);
+}
+
+static int
+i8042_init(struct module *modp)
+{
+    uint8_t byte;
+    int error;
+
+    error = clkdev_get(CLKDEV_MSLEEP | CLKDEV_GET_USEC, &clk);
+    if (error < 0) {
+        printf("i8042: could not get clkdev\n");
+        return error;
+    }
+
+    i8042_write(true, I8042_DISABLE_PORT0);
+    i8042_write(true, I8042_DISABLE_PORT1);
+    i8042_init_intr();
+
+    i8042_write(true, I8042_ENABLE_PORT0);
+    i8042_read();
+    return 0;
+}
+
+MODULE_EXPORT("i8042", MODTYPE_GENERIC, i8042_init);
diff --git a/src/sys/include/arch/amd64/i8042var.h b/src/sys/include/arch/amd64/i8042var.h
new file mode 100644
index 0000000..ec2c36e
--- /dev/null
+++ b/src/sys/include/arch/amd64/i8042var.h
@@ -0,0 +1,79 @@
+/*
+ * Copyright (c) 2025 Ian Marco Moffett and L5 engineers
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _MACHINE_I8042VAR_H_
+#define _MACHINE_I8042VAR_H_ 1
+
+/* I/O bus ports */
+#define I8042_CMD       0x64
+#define I8042_DATA      0x60
+#define I8042_STATUS    0x64
+
+#define KB_IRQ      1       /* Keyboard IRQ */
+#define I8042_DELAY 20      /* Poll delay (in ms) */
+
+/* i8042 status */
+#define I8042_OBUFF BIT(0)  /* Output buffer full */
+#define I8042_IBUFF BIT(1)  /* Input buffer full */
+#define I8042_TTO   BIT(5)  /* Transmit timeout */
+#define I8042_RTO   BIT(6)  /* Receive timeout */
+#define I8042_PAR   BIT(7)  /* Parity error */
+
+/* i8042 commands */
+#define I8042_SELF_TEST     0xAA
+#define I8042_DISABLE_PORT0 0xAD
+#define I8042_DISABLE_PORT1 0xA7
+#define I8042_ENABLE_PORT0  0xAE
+#define I8042_ENABLE_PORT1  0xA8
+#define I8042_GET_CONFB     0x20
+#define I8042_SET_CONFB     0x60
+#define I8042_PORT1_SEND    0xD4
+
+/* i8042 config bits */
+#define I8042_PORT0_INTR    BIT(0)
+#define I8042_PORT1_INTR    BIT(1)
+#define I8042_PORT0_CLK     BIT(4)
+#define I8042_PORT1_CLK     BIT(5)
+
+/* Aux commands */
+#define I8042_AUX_DEFAULTS 0xF5
+#define I8042_AUX_ENABLE   0xF4
+#define I8042_AUX_DISABLE  0xF5
+#define I8042_AUX_RESET    0xFF
+
+/* LED bits */
+#define I8042_LED_SCROLL    BIT(0)
+#define I8042_LED_NUM       BIT(1)
+#define I8042_LED_CAPS      BIT(2)
+
+/* Extended scancode types */
+#define I8042_XSC_ENDPR  0      /* End pressed */
+#define I8042_XSC_ENDRL  1      /* End released */
+
+#endif  /* !_MACHINE_I8042VAR_H_ */