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| author | Ian Moffett <ian@osmora.org> | 2025-10-02 20:32:45 -0400 |
|---|---|---|
| committer | Ian Moffett <ian@osmora.org> | 2025-10-02 20:32:45 -0400 |
| commit | 3bfeff510fefc2e833d7f87af14ca274d6936352 (patch) | |
| tree | 6a20947f065f42a99ff70e4fb8b664770e29b4fc | |
| parent | c904bc2b78045bd81cfc3603422c385cbf7adc75 (diff) | |
np/amd64: piir: Add 32-bit register ID list
This commit adds a 32-bit register ID list as well as the beginning of
ABI specific values
Signed-off-by: Ian Moffett <ian@osmora.org>
| -rw-r--r-- | src/sys/arch/amd64/np/piir_conv.c | 21 |
1 files changed, 19 insertions, 2 deletions
diff --git a/src/sys/arch/amd64/np/piir_conv.c b/src/sys/arch/amd64/np/piir_conv.c index bb94738..280e0a7 100644 --- a/src/sys/arch/amd64/np/piir_conv.c +++ b/src/sys/arch/amd64/np/piir_conv.c @@ -44,6 +44,23 @@ typedef md_byte_t inst_t[8]; +/* + * Valid 32-bit register IDs + */ +typedef enum { + R32_EAX, + R32_ECX, + R32_EDX, + R32_EBX, + R32_ESP, + R32_EBP, + R32_ESI, + R32_RDI +} r32_t; + +/* SYS-V ABI specific */ +#define R32_RETVAL R32_EAX + /* Declare an instruction array */ #define INST_DECL(...) ((inst_t)__VA_ARGS__) @@ -56,7 +73,7 @@ typedef md_byte_t inst_t[8]; #define OP_NOP_LEN 1 /* MOV R32, IMM32 (B8 + rd) */ -#define OP_LOAD32_R32(IMM32) INST_DECL({0xB8, (IMM32)}) +#define OP_LOAD32_R32(IMM32, RD) INST_DECL({0xB8 + (RD), (IMM32)}) #define OP_LOAD32_R32_LEN 5 /* @@ -101,7 +118,7 @@ md_piir_decode(struct np_work *work, struct piir_vm *vm, ir_byte_t input) } return vm_push( - vm, OP_LOAD32_R32(input), + vm, OP_LOAD32_R32(input, R32_RETVAL), OP_LOAD32_R32_LEN ); case PIIR_NOP: |