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-rw-r--r--usr.bin/oemu/Makefile7
-rw-r--r--usr.bin/oemu/cpu.c329
-rw-r--r--usr.bin/oemu/emu.c127
-rw-r--r--usr.bin/oemu/include/oemu/cpu.h83
-rw-r--r--usr.bin/oemu/include/oemu/osmx64.h84
-rw-r--r--usr.bin/oemu/include/oemu/types.h40
6 files changed, 670 insertions, 0 deletions
diff --git a/usr.bin/oemu/Makefile b/usr.bin/oemu/Makefile
new file mode 100644
index 0000000..366208c
--- /dev/null
+++ b/usr.bin/oemu/Makefile
@@ -0,0 +1,7 @@
+include user.mk
+
+CFILES = $(shell find . -name "*.c")
+CFLAGS = -Iinclude/
+
+$(ROOT)/base/usr/bin/oemu:
+ gcc $(CFILES) -o $@ $(INTERNAL_CFLAGS) $(CFLAGS)
diff --git a/usr.bin/oemu/cpu.c b/usr.bin/oemu/cpu.c
new file mode 100644
index 0000000..07ddc7b
--- /dev/null
+++ b/usr.bin/oemu/cpu.c
@@ -0,0 +1,329 @@
+/*
+ * Copyright (c) 2023-2025 Ian Marco Moffett and the Osmora Team.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of Hyra nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/param.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stdio.h>
+#include <oemu/cpu.h>
+#include <oemu/types.h>
+#include <oemu/osmx64.h>
+
+/*
+ * Decode the INST_MOV_IMM instruction
+ *
+ * @cpu: CPU that is executing
+ * @inst: Instruction dword
+ */
+static void
+cpu_mov_imm(struct oemu_cpu *cpu, inst_t *inst)
+{
+ struct cpu_regs *regs = &cpu->regs;
+
+ if (inst->rd > NELEM(regs->xreg)) {
+ printf("bad register operand for 'mov'\n");
+ return;
+ }
+
+ regs->xreg[inst->rd] = inst->imm;
+ printf("#%d -> x%d\n", inst->imm, inst->rd);
+}
+
+/*
+ * Decode the INST_INC instruction
+ *
+ * @cpu: CPU that is executing
+ * @inst: Instruction dword
+ */
+static void
+cpu_inc(struct oemu_cpu *cpu, inst_t *inst)
+{
+ struct cpu_regs *regs = &cpu->regs;
+ imm_t imm;
+
+ if (inst->rd > NELEM(regs->xreg)) {
+ printf("bad register operand for 'mov'\n");
+ return;
+ }
+
+ imm = regs->xreg[inst->rd]++;
+ printf("INC X%d [%x], new=%x\n", inst->rd,
+ imm, regs->xreg[inst->rd]);
+}
+
+/*
+ * Decode the INST_DEC instruction
+ *
+ * @cpu: CPU that is executing
+ * @inst: Instruction dword
+ */
+static void
+cpu_dec(struct oemu_cpu *cpu, inst_t *inst)
+{
+ struct cpu_regs *regs = &cpu->regs;
+ imm_t imm;
+
+ if (inst->rd > NELEM(regs->xreg)) {
+ printf("bad register operand for 'mov'\n");
+ return;
+ }
+
+ imm = regs->xreg[inst->rd]--;
+ printf("DEC X%d [%x], new=%x\n", inst->rd,
+ imm, regs->xreg[inst->rd]);
+}
+
+/*
+ * Decode the INST_ADD instruction
+ *
+ * @cpu: CPU that is executing
+ * @inst: Instruction dword
+ */
+static void
+cpu_add(struct oemu_cpu *cpu, inst_t *inst)
+{
+ struct cpu_regs *regs = &cpu->regs;
+ imm_t imm;
+
+ if (inst->rd > NELEM(regs->xreg)) {
+ printf("bad register operand for 'add'\n");
+ return;
+ }
+
+ imm = regs->xreg[inst->rd];
+ regs->xreg[inst->rd] += inst->imm;
+ printf("%d + %d -> X%d, new=%d\n",
+ imm, inst->imm, inst->rd, regs->xreg[inst->rd]);
+}
+
+/*
+ * Decode the INST_SUB instruction
+ *
+ * @cpu: CPU that is executing
+ * @inst: Instruction dword
+ */
+static void
+cpu_sub(struct oemu_cpu *cpu, inst_t *inst)
+{
+ struct cpu_regs *regs = &cpu->regs;
+ imm_t imm;
+
+ if (inst->rd > NELEM(regs->xreg)) {
+ printf("bad register operand for 'sub'\n");
+ return;
+ }
+
+ imm = regs->xreg[inst->rd];
+ regs->xreg[inst->rd] -= inst->imm;
+ printf("%d - %d -> X%d, new=%d\n",
+ imm, inst->imm, inst->rd, regs->xreg[inst->rd]);
+}
+
+/*
+ * Decode the INST_MUL instruction
+ *
+ * @cpu: CPU that is executing
+ * @inst: Instruction dword
+ */
+static void
+cpu_mul(struct oemu_cpu *cpu, inst_t *inst)
+{
+ struct cpu_regs *regs = &cpu->regs;
+ imm_t imm;
+
+ if (inst->rd > NELEM(regs->xreg)) {
+ printf("bad register operand for 'mul'\n");
+ return;
+ }
+
+ imm = regs->xreg[inst->rd];
+ regs->xreg[inst->rd] *= inst->imm;
+ printf("%d * %d -> X%d, new=%d\n",
+ imm, inst->imm, inst->rd, regs->xreg[inst->rd]);
+}
+
+/*
+ * Decode the INST_DIV instruction
+ *
+ * @cpu: CPU that is executing
+ * @inst: Instruction dword
+ */
+static void
+cpu_div(struct oemu_cpu *cpu, inst_t *inst)
+{
+ struct cpu_regs *regs = &cpu->regs;
+ imm_t imm;
+
+ if (inst->rd > NELEM(regs->xreg)) {
+ printf("bad register operand for 'div'\n");
+ return;
+ }
+
+ imm = regs->xreg[inst->rd];
+ if (imm == 0) {
+ /* TODO: Some sort of interrupt */
+ printf("** DIVIDE BY ZERO **\n");
+ return;
+ }
+
+ regs->xreg[inst->rd] /= inst->imm;
+ printf("%d / %d -> X%d, new=%d\n",
+ imm, inst->imm, inst->rd, regs->xreg[inst->rd]);
+}
+
+/*
+ * Decode the INST_DIV instruction
+ */
+static void
+cpu_br(struct oemu_cpu *cpu, inst_t *inst)
+{
+ struct cpu_regs *regs = &cpu->regs;
+ imm_t imm;
+ addr_t br_to;
+
+ if (inst->rd > NELEM(regs->xreg)) {
+ printf("bad register operand for 'br'\n");
+ return;
+ }
+
+ /*
+ * If we are branching to the reset vector, might
+ * as well reset all state.
+ */
+ br_to = regs->xreg[inst->rd];
+ if (br_to == 0) {
+ cpu_reset(cpu);
+ }
+
+ regs->ip = br_to;
+}
+
+/*
+ * Reset a CPU to a default state
+ */
+void
+cpu_reset(struct oemu_cpu *cpu)
+{
+ struct cpu_regs *regs;
+
+ /*
+ * When an OSMX64 processor first starts up, it will
+ * initially be executing in supervisor mode with all
+ * of its registeres initialized to zeros.
+ */
+ regs = &cpu->regs;
+ regs->ip = 0;
+ regs->sr_state = CPU_SRS_SV;
+ regs->blr = 0x0;
+ regs->ilr = 0x0;
+ memset(regs->xreg, 0x0, sizeof(regs->xreg));
+}
+
+void
+cpu_regdump(struct oemu_cpu *cpu)
+{
+ struct cpu_regs *regs;
+
+ regs = &cpu->regs;
+ printf(
+ "X0=%p, X1=%p, X2=%p\n"
+ "X3=%p, X4=%p, X5=%p\n"
+ "X6=%p, X7=%p, X8=%p\n"
+ "X9=%p, X10=%p, X11=%p\n"
+ "X12=%p, X13=%p, X14=%p\n"
+ "X15=%p, IP=%p, SRS=%p\n"
+ "BLR=%p, ILR=%p\n",
+ regs->xreg[0], regs->xreg[1],
+ regs->xreg[2], regs->xreg[3],
+ regs->xreg[4], regs->xreg[5],
+ regs->xreg[6], regs->xreg[7],
+ regs->xreg[8], regs->xreg[9],
+ regs->xreg[10], regs->xreg[11],
+ regs->xreg[12], regs->xreg[13],
+ regs->xreg[14], regs->xreg[15],
+ regs->ip, regs->sr_state,
+ regs->blr, regs->ilr
+ );
+}
+
+/*
+ * Main instruction execution loop.
+ */
+void
+cpu_kick(struct oemu_cpu *cpu, struct sysmem *mem)
+{
+ struct cpu_regs *regs = &cpu->regs;
+ inst_t *inst;
+ uint8_t *memp = mem->mem;
+
+ for (;;) {
+ inst = (inst_t *)&memp[regs->ip];
+
+ switch (inst->opcode) {
+ case INST_MOV_IMM:
+ cpu_mov_imm(cpu, inst);
+ break;
+ case INST_INC:
+ cpu_inc(cpu, inst);
+ break;
+ case INST_DEC:
+ cpu_dec(cpu, inst);
+ break;
+ case INST_ADD:
+ cpu_add(cpu, inst);
+ break;
+ case INST_SUB:
+ cpu_sub(cpu, inst);
+ break;
+ case INST_MUL:
+ cpu_mul(cpu, inst);
+ break;
+ case INST_DIV:
+ cpu_div(cpu, inst);
+ break;
+ case INST_BR:
+ cpu_br(cpu, inst);
+ break;
+ }
+
+ /* Is this a halt instruction? */
+ if (inst->opcode == INST_HLT) {
+ printf("HALTED\n");
+ break;
+ }
+
+ if (regs->ip >= MEMORY_SIZE) {
+ break;
+ }
+
+ regs->ip += sizeof(*inst);
+ }
+
+ cpu_regdump(cpu);
+}
diff --git a/usr.bin/oemu/emu.c b/usr.bin/oemu/emu.c
new file mode 100644
index 0000000..1b4280b
--- /dev/null
+++ b/usr.bin/oemu/emu.c
@@ -0,0 +1,127 @@
+/*
+ * Copyright (c) 2023-2025 Ian Marco Moffett and the Osmora Team.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of Hyra nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/errno.h>
+#include <stdio.h>
+#include <fcntl.h>
+#include <unistd.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <oemu/cpu.h>
+
+static struct oemu_cpu core_0;
+struct sysmem g_mem;
+
+static void
+help(void)
+{
+ printf(
+ "OSMORA OSMX64 Emulator\n"
+ "usage: oemu <binary file>\n"
+ );
+}
+
+/*
+ * Allocate and initialize platform
+ * memory.
+ */
+static int
+mem_init(void)
+{
+ printf("allocating 0x%x bytes of memory\n", MEMORY_SIZE);
+ g_mem.mem_size = MEMORY_SIZE;
+ g_mem.mem = malloc(MEMORY_SIZE);
+ if (g_mem.mem == NULL) {
+ printf("failed to allocate memory\n");
+ return -1;
+ }
+}
+
+/*
+ * Load a program specified by a path into
+ * memory for execution.
+ */
+static int
+program_load(const char *path, paddr_t loadoff)
+{
+ void *mem = g_mem.mem;
+ size_t size;
+ int fd;
+
+ fd = open(path, O_RDONLY);
+ if (fd < 0) {
+ printf("failed to open \"%s\"\n", path);
+ return -ENOENT;
+ }
+
+ /* Grab the size of the file */
+ size = lseek(fd, 0, SEEK_END);
+ lseek(fd, loadoff, SEEK_SET);
+ printf("loading size %d\n", size);
+
+ /* Is it too big? */
+ if (size >= g_mem.mem_size) {
+ printf("program too big !! (memsize=%x)\n", g_mem.mem_size);
+ close(fd);
+ return -1;
+ }
+
+ printf("read data into %p\n", mem);
+ printf("read %d bytes\n", read(fd, mem, size));
+ close(fd);
+ return 0;
+}
+
+int
+main(int argc, char **argv)
+{
+ if (argc < 2) {
+ help();
+ return -1;
+ }
+
+ /* Initialize memory */
+ if (mem_init() < 0) {
+ return -1;
+ }
+
+ /* Put the CPU in a known state */
+ cpu_reset(&core_0);
+
+ /*
+ * Load the program and send the little guy off
+ * to start nomming those 32-bit instructions
+ */
+ if (program_load(argv[1], 0x00000000) < 0) {
+ return -1;
+ }
+ cpu_kick(&core_0, &g_mem);
+ free(g_mem.mem);
+ return 0;
+}
diff --git a/usr.bin/oemu/include/oemu/cpu.h b/usr.bin/oemu/include/oemu/cpu.h
new file mode 100644
index 0000000..882fe93
--- /dev/null
+++ b/usr.bin/oemu/include/oemu/cpu.h
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2023-2025 Ian Marco Moffett and the Osmora Team.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of Hyra nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _OEMU_CPU_H_
+#define _OEMU_CPU_H_
+
+#include <sys/types.h>
+#include <sys/param.h>
+#include <stdint.h>
+#include <stddef.h>
+#include <oemu/types.h>
+
+#define MEMORY_SIZE 512
+
+/*
+ * Processor state register
+ */
+#define CPU_SRS_SV BIT(1) /* Supervisor flag */
+#define CPU_SRS_CARRY BIT(2) /* Carry flag */
+
+/*
+ * System memory
+ *
+ * @mem: Data
+ * @mem_size: Memory size max
+ */
+struct sysmem {
+ void *mem;
+ size_t mem_size;
+};
+
+/*
+ * CPU register state
+ *
+ * @xreg: X<n>
+ * @ip: Instruction pointer
+ * @sr_state: Processor state register
+ * @blr: Branch link register
+ * @ilr: Interrupt link register
+ */
+struct cpu_regs {
+ reg_t xreg[16];
+ reg_t ip;
+ reg_t sr_state;
+ reg_t blr;
+ reg_t ilr;
+};
+
+struct oemu_cpu {
+ struct cpu_regs regs;
+};
+
+void cpu_regdump(struct oemu_cpu *cpu);
+void cpu_reset(struct oemu_cpu *cpu);
+void cpu_kick(struct oemu_cpu *cpu, struct sysmem *mem);
+
+#endif /* !_OEMU_CPU_H_ */
diff --git a/usr.bin/oemu/include/oemu/osmx64.h b/usr.bin/oemu/include/oemu/osmx64.h
new file mode 100644
index 0000000..b1df5d3
--- /dev/null
+++ b/usr.bin/oemu/include/oemu/osmx64.h
@@ -0,0 +1,84 @@
+/*
+ * Copyright (c) 2023-2025 Ian Marco Moffett and the Osmora Team.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of Hyra nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _OEMU_OSMX64_H_
+#define _OEMU_OSMX64_H_
+
+#include <stdint.h>
+
+/* Opcodes */
+#define INST_NOP 0x00 /* No-operation */
+#define INST_ADD 0x01 /* Add operation */
+#define INST_SUB 0x02 /* Sub operation */
+#define INST_MUL 0x03 /* Multiply operation */
+#define INST_DIV 0x04 /* Divide operation */
+#define INST_INC 0x05 /* Increment operation */
+#define INST_DEC 0x06 /* Decrement operation */
+#define INST_OR 0x07 /* Bitwise OR operation */
+#define INST_XOR 0x08 /* Bitwise XOR operation */
+#define INST_AND 0x09 /* Bitwise AND operation */
+#define INST_NOT 0x10 /* Bitwise NOT operation */
+#define INST_SLL 0x11 /* Shift left logical operation */
+#define INST_SRL 0x12 /* Shift right logical operation */
+#define INST_MOV_IMM 0x13 /* Data move operation from IMM */
+#define INST_HLT 0x14 /* Halt */
+#define INST_BR 0x15 /* Branch */
+
+/* Registers */
+#define REG_X0 0x00
+#define REG_X1 0x01
+#define REG_X2 0x02
+#define REG_X3 0x03
+#define REG_X4 0x04
+#define REG_X5 0x05
+#define REG_X6 0x06
+#define REG_X7 0x07
+#define REG_X8 0x08
+#define REG_X9 0x09
+#define REG_X10 0x0A
+#define REG_X11 0x0B
+#define REG_X12 0x0C
+#define REG_X13 0x0D
+#define REG_X14 0x0E
+#define REG_X15 0x0F
+#define REG_BAD 0xFF
+
+/*
+ * OSMX64 instruction format
+ */
+typedef struct {
+ uint8_t opcode;
+ uint8_t rd;
+ union {
+ uint16_t imm;
+ uint16_t unused;
+ };
+} inst_t;
+
+#endif /* !_OEMU_OSMX64_H_ */
diff --git a/usr.bin/oemu/include/oemu/types.h b/usr.bin/oemu/include/oemu/types.h
new file mode 100644
index 0000000..caf6e9b
--- /dev/null
+++ b/usr.bin/oemu/include/oemu/types.h
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2023-2025 Ian Marco Moffett and the Osmora Team.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of Hyra nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _OEMU_TYPES_H_
+#define _OEMU_TYPES_H_
+
+#include <sys/types.h>
+
+typedef uint64_t reg_t;
+typedef uintptr_t addr_t;
+typedef uint16_t imm_t;
+typedef addr_t paddr_t;
+
+#endif /* !_OEMU_TYPES_H_ */
generated by cgit v1.2.3 (git 2.39.1) at 2025-07-22 20:26:27 +0000