diff options
author | Ian Moffett <ian@osmora.org> | 2025-07-22 14:43:37 -0400 |
---|---|---|
committer | Ian Moffett <ian@osmora.org> | 2025-07-22 14:43:37 -0400 |
commit | ff5a77f6f2ee9e7086b0f2c16cf0752a2d105d33 (patch) | |
tree | c3e9529b4a4741106b074b53bfc0f2c5a26e9b6b /usr.bin/oemu | |
parent | cf3b1238d3ebdf6184a9977ee6e0d3057313444c (diff) |
oemu: cpu: Add link registers and SR_STATEexpt
Signed-off-by: Ian Moffett <ian@osmora.org>
Diffstat (limited to 'usr.bin/oemu')
-rw-r--r-- | usr.bin/oemu/cpu.c | 14 | ||||
-rw-r--r-- | usr.bin/oemu/include/oemu/cpu.h | 13 |
2 files changed, 25 insertions, 2 deletions
diff --git a/usr.bin/oemu/cpu.c b/usr.bin/oemu/cpu.c index 58dd134..418febb 100644 --- a/usr.bin/oemu/cpu.c +++ b/usr.bin/oemu/cpu.c @@ -205,8 +205,16 @@ cpu_reset(struct oemu_cpu *cpu) { struct cpu_regs *regs; + /* + * When an OSMX64 processor first starts up, it will + * initially be executing in supervisor mode with all + * of its registeres initialized to zeros. + */ regs = &cpu->regs; regs->ip = 0; + regs->sr_state = CPU_SRS_SV; + regs->blr = 0x0; + regs->ilr = 0x0; memset(regs->xreg, 0x0, sizeof(regs->xreg)); } @@ -222,7 +230,8 @@ cpu_regdump(struct oemu_cpu *cpu) "X6=%p, X7=%p, X8=%p\n" "X9=%p, X10=%p, X11=%p\n" "X12=%p, X13=%p, X14=%p\n" - "X15=%p, IP=%p\n", + "X15=%p, IP=%p, SRS=%p\n" + "BLR=%p, ILR=%p\n", regs->xreg[0], regs->xreg[1], regs->xreg[2], regs->xreg[3], regs->xreg[4], regs->xreg[5], @@ -231,7 +240,8 @@ cpu_regdump(struct oemu_cpu *cpu) regs->xreg[10], regs->xreg[11], regs->xreg[12], regs->xreg[13], regs->xreg[14], regs->xreg[15], - regs->ip + regs->ip, regs->sr_state, + regs->blr, regs->ilr ); } diff --git a/usr.bin/oemu/include/oemu/cpu.h b/usr.bin/oemu/include/oemu/cpu.h index 78b92da..882fe93 100644 --- a/usr.bin/oemu/include/oemu/cpu.h +++ b/usr.bin/oemu/include/oemu/cpu.h @@ -31,6 +31,7 @@ #define _OEMU_CPU_H_ #include <sys/types.h> +#include <sys/param.h> #include <stdint.h> #include <stddef.h> #include <oemu/types.h> @@ -38,6 +39,12 @@ #define MEMORY_SIZE 512 /* + * Processor state register + */ +#define CPU_SRS_SV BIT(1) /* Supervisor flag */ +#define CPU_SRS_CARRY BIT(2) /* Carry flag */ + +/* * System memory * * @mem: Data @@ -53,10 +60,16 @@ struct sysmem { * * @xreg: X<n> * @ip: Instruction pointer + * @sr_state: Processor state register + * @blr: Branch link register + * @ilr: Interrupt link register */ struct cpu_regs { reg_t xreg[16]; reg_t ip; + reg_t sr_state; + reg_t blr; + reg_t ilr; }; struct oemu_cpu { |