From 860ac5d5d1c047bd388aed8ac9c0570a118a5034 Mon Sep 17 00:00:00 2001
From: Ian Moffett <ian@osmora.org>
Date: Wed, 19 Nov 2025 01:02:33 -0500
Subject: kern/amd64+mu: panic: Dump registers on panic

Signed-off-by: Ian Moffett <ian@osmora.org>
---
 sys/arch/amd64/os/os_panic.c | 85 ++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 85 insertions(+)

(limited to 'sys/arch')

diff --git a/sys/arch/amd64/os/os_panic.c b/sys/arch/amd64/os/os_panic.c
index ecad944..2215ec6 100644
--- a/sys/arch/amd64/os/os_panic.c
+++ b/sys/arch/amd64/os/os_panic.c
@@ -28,8 +28,93 @@
  */
 
 #include <sys/types.h>
+#include <sys/cdefs.h>
+#include <os/trace.h>
 #include <mu/panic.h>
 
+/*
+ * XXX: We could implement panic() as an assembly stub
+ *      that takes a register snapshot and passes it to
+ *      an MI routine which calls into the MD side using
+ *      it as an argument, that could be better...
+ */
+void
+mu_panic_dump(void)
+{
+    static uint64_t cr4, cr3, cr2, cr0;
+    static uint64_t rax, rbx, rcx, rdx;
+    static uint64_t r[16], rbp, rsp;
+
+    __asmv(
+        "mov %%cr4, %0\n\t"
+        "mov %%cr3, %1\n\t"
+        "mov %%cr2, %2\n\t"
+        "mov %%cr0, %3"
+        : "=r" (cr4),
+          "=r" (cr3),
+          "=r" (cr2),
+          "=r" (cr0)
+        :
+        : "memory"
+    );
+
+    __asmv(
+        "mov %%r8, %0\n\t"
+        "mov %%r9, %1\n\t"
+        "mov %%r10, %2\n\t"
+        "mov %%r11, %3\n\t"
+        "mov %%r12, %4\n\t"
+        "mov %%r13, %5\n\t"
+        "mov %%r14, %6\n\t"
+        "mov %%r15, %7\n\t"
+        "mov %%rax, %8\n\t"
+        "mov %%rbx, %8\n\t"
+        "mov %%rcx, %9\n\t"
+        "mov %%rdx, %10\n\t"
+        "mov %%rbp, %11\n\t"
+        "mov %%rsp, %12"
+        : "=r" (r[0]),
+          "=r" (r[1]),
+          "=r" (r[2]),
+          "=r" (r[3]),
+          "=r" (r[4]),
+          "=r" (r[5]),
+          "=r" (r[6]),
+          "=r" (r[7]),
+          "=r" (rax),
+          "=r" (rbx),
+          "=r" (rcx),
+          "=r" (rdx),
+          "=r" (rbp),
+          "=r" (rsp)
+        :
+        : "memory"
+    );
+
+    trace(
+        "CR0=%p CR2=%p\nCR3=%p CR4=%p\n",
+        cr0, cr2, cr3, cr4
+    );
+
+    trace(
+        "---------------------------------------------\n"
+        "RAX=%p RBX=%p\nRCX=%p RDX=%p\n"
+        "RBP=%p RSP=%p\n",
+        rax, rbx, rcx, rdx,
+        rbp, rsp
+    );
+
+    trace(
+        "---------------------------------------------\n"
+        "R15=%p R14=%p\nR13=%p R12=%p\nR11=%p R10=%p\n"
+        "R9=%p R8=%p",
+        r[7], r[6], r[5],
+        r[4], r[3], r[2],
+        r[1], r[0]
+    );
+
+}
+
 void
 mu_panic_hcf(void)
 {
-- 
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