| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2023-09-18 | Fix register mismatch | sigsegv7 | |
| Signed-off-by: sigsegv7 <ian@vegaa.systems> | |||
| 2023-09-18 | Fix overflow issue + odd behaviour | sigsegv7 | |
| It is best to check for an overflow risk and lower the step BEFORE we actually perform the inversion Signed-off-by: sigsegv7 <ian@vegaa.systems> | |||
| 2023-09-18 | Shift step left by 1 if SSE is supported | sigsegv7 | |
| This is a faster way of increasing the step as they are in powers of two. Signed-off-by: sigsegv7 <ian@vegaa.systems> | |||
| 2023-09-18 | Optimize with SSE2/SSE3 and 128 bit inversions | sigsegv7 | |
| Signed-off-by: sigsegv7 <ian@vegaa.systems> | |||
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