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authorsigsegv7 <ian@vegaa.systems>2023-09-18 04:43:13 -0400
committersigsegv7 <ian@vegaa.systems>2023-09-18 04:43:13 -0400
commit376a883dea5caa28ae66267bd957699ad496b5d5 (patch)
tree5fda1ef7779231a94d11712bd36f573cdf5d9a36 /src
parentb0f9a0d87820b1e32e93bbf6a93031e308c182a8 (diff)
cleanup comments
Signed-off-by: sigsegv7 <ian@vegaa.systems>
Diffstat (limited to 'src')
-rw-r--r--src/sse_accel.S15
1 files changed, 5 insertions, 10 deletions
diff --git a/src/sse_accel.S b/src/sse_accel.S
index dab5dce..98a5ea0 100644
--- a/src/sse_accel.S
+++ b/src/sse_accel.S
@@ -34,15 +34,10 @@
* accel_invert128(uint64_t addr)
*/
accel_invert128:
- movq %rdi, %rax
- movdqu (%rax), %xmm0
+ movq %rdi, %rax // Store first argument in %rax
+ movdqu (%rax), %xmm0 // Read 128 bits from ptr in %rax into %xmm0
- /*
- * Set %xmm1 to all 1s and emulate NOT for %xmm0.
- * Result of inversion will be stored in %xmm1.
- */
- pcmpeqb %xmm1, %xmm1
- pxor %xmm0, %xmm1
-
- movdqu %xmm1, (%rax)
+ pcmpeqb %xmm1, %xmm1 // Set %xmm1 to all 1s
+ pxor %xmm0, %xmm1 // NOT %xmm0; result stored in %xmm1
+ movdqu %xmm1, (%rax) // Writeback the result
retq