path: root/emux64/src/cpu/cpu_cycle.c

/*
 * Copyright (c) 2025 Ian Marco Moffett and the Osmora Team.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 * 1. Redistributions of source code must retain the above copyright notice,
 *    this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of Hyra nor the names of its
 *    contributors may be used to endorse or promote products derived from
 *    this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#include <stdio.h>
#include <errno.h>
#include <stdbool.h>
#include "rom.h"
#include "cpu/cpu.h"

/*
 * Represents arithmetic arguments
 *
 * @dest_reg: Destination register [R]
 * @op1: Operand 1 [IMM]
 * op2: Operand 2 [IMM]
 */
struct arithop {
    uint8_t dest_reg;
    uint64_t op1;
    uint64_t op2;
};

/*
 * Returns true if the register is an
 * X<n> type register
 *
 * @reg: Register to check
 */
static inline bool
reg_is_xn(uint8_t reg)
{
    return reg >= REG_XN_BASE && reg <= REG_XN_LIMIT;
}

/*
 * Fetch an instruction byte from memory
 *
 * @core: Core to fetch for
 * @byte_res: Result is written here
 *
 * XXX: Caller is to increment `core->pc'
 *
 * Returns zero on success
 */
static int
cpu_fetch(struct osmx_core *core, uint8_t *byte_res)
{
    uint8_t *rom;
    size_t rom_len;

    if (core == NULL || byte_res == NULL) {
        printf("fatal: bad arg in %s()\n", __func__);
        return -1;
    }

    if ((rom = g_firmware.buf) == NULL) {
        printf("fatal: ROM is uninitialized\n");
        return -1;
    }

    rom_len = g_firmware.length;
    if (core->pc >= (CPU_BUA_PBASE + rom_len)) {
        printf("fatal: PC outside of ROM\n");
        return -1;
    }

    if (core->pc >= CPU_BUA_PBASE) {
        *byte_res = rom[core->pc - CPU_BUA_PBASE];
    }

    return 0;
}

/*
 * Get a 32-bit value from values @ PC
 */
static int
cpu_fetch32(struct osmx_core *core, uint64_t *res)
{
    uint64_t v = 0;
    uint8_t byte;
    int error;

    if (core == NULL || res == NULL) {
        return -EINVAL;
    }

    for (int i = 0; i < 32; i += 8) {
        error = cpu_fetch(core, &byte);
        if (error < 0) {
            return error;
        }

        v |= (byte << i);
        core->pc++;
    }

    *res = v;
    return 0;
}

/*
 * Get arithmetic parameters
 *
 * @core: Core that is executing
 * @res: Result written here
 *
 * Returns zero on success
 */
static int
cpu_arithop(struct osmx_core *core, struct arithop *res)
{
    uint8_t dest, op1, op2;
    uint64_t op2_val;
    bool op2_is_imm;
    bool op2_is_big;
    int error = 0;

    if (core == NULL || res == NULL) {
        return -EINVAL;
    }

    /* Grab the dest register */
    error = cpu_fetch(core, &dest);
    if (error < 0) {
        return error;
    }

    ++core->pc;

    error = cpu_fetch(core, &op1);
    if (error < 0) {
        return error;
    }

    ++core->pc;

    /*
     * Operand one is 7 bits as the first bit in the
     * byte is used for indicating if the second operand
     * is an immediate value (1) or a register (0)
     */
    op2_is_imm = op1 & 1;
    op1 >>= 1;

    /* Verify the register types */
    if (!reg_is_xn(dest) || dest == 0)
        return -1;
    if (!reg_is_xn(op1))
        return -1;

    if (op2_is_imm) {
        error = cpu_fetch32(core, &op2_val);
    } else {
        op2_val = core->xn[op2 - REG_XN_BASE];
    }

    if (error != 0) {
        return error;
    }

    res->dest_reg = dest;
    res->op1 = core->xn[op1];
    res->op2 = op2_val;
    return 0;
}

static int
cpu_do_add(struct osmx_core *core)
{
    struct arithop ops;
    int error;

    error = cpu_arithop(core, &ops);
    if (error < 0) {
        return error;
    }

    core->xn[ops.dest_reg] = ops.op1 + ops.op2;
    return 0;

}

int
cpu_run(struct osmx_core *core)
{
    uint8_t opcode;
    int error;

    if (core == NULL) {
        return -EINVAL;
    }

    core->run = 1;
    while (core->run) {
        error = cpu_fetch(core, &opcode);
        if (error < 0) {
            printf("cpu: instruction fetch error\n");
            core->run = 0;
            break;
        }

        ++core->pc;

        /* Test opcode cases */
        switch (opcode) {
        case OP_HLT:
            printf("** HALTED **\n");
            core->run = false;
            continue;
        case OP_ADD:
            if (cpu_do_add(core) < 0) {
                core->run = false;
                continue;
            }
            break;
        case OP_NOP:
            break;
        default:
            printf("** INVALID OPCODE **\n");
            break;
        }

        printf("--\n");
        cpu_dump(core);
    }
}