From 6ceec92cd3c2b390733aa3a795e40eecb4557c77 Mon Sep 17 00:00:00 2001
From: Ian Moffett <ian@osmora.org>
Date: Sat, 27 Jul 2024 20:13:39 -0400
Subject: Add data movement instructions

Signed-off-by: Ian Moffett <ian@osmora.org>
---
 README.md | 41 +++++++++++++++++++++++++++++++++++------
 1 file changed, 35 insertions(+), 6 deletions(-)

(limited to 'README.md')

diff --git a/README.md b/README.md
index 7ba95cf..9383f6d 100644
--- a/README.md
+++ b/README.md
@@ -31,12 +31,11 @@ Only accessed by the CPU for certain instructions. Cannot be directly read/writt
 
 Bitwise logic operations can write to all registers except `v0`-`v7`, `x0` and `pc`. Can read from all registers except `v0`-`v7`.
 
-| Mnemonic                     | Effect                 |
-| ---------------------------- | ---------------------- |
-| `mov` dst: r/m, src: r/m/imm | `dst` = `src`          |
-| `and` dst: r/m, val: r/m/imm | `dst` = `dst` & `val`  |
-| `or` dst: r/m, val: r/m/imm  | `dst` = `dst` \| `val` |
-| `xor` dst: r/m, val: r/m/imm | `dst` = `dst` ^ `val`  |
+| Mnemonic                         | Effect                 |
+| -------------------------------- | ---------------------- |
+| `and` dst: r, reg: r, val: r/imm | `dst` = `dst` & `val`  |
+| `or` dst: r, reg: r, val: r/imm  | `dst` = `dst` \| `val` |
+| `xor` dst: r, reg: r, val: r/imm | `dst` = `dst` ^ `val`  |
 
 #### Example
 ```
@@ -47,6 +46,36 @@ and x1, #1
 /* x1 now equals 1 */
 ```
 
+### Data Movement Instructions
+
+| Mnemonic                              | Effect
+| ------------------------------------- | ---------------------------------- |
+| `mov` dst: r, src: r/imm              | `dst` = `src`                      |
+| `stb` src: r, [dst: m, offset: r/imm] | 1-byte write to memory at `dst`    |
+| `stw` src: r, [dst: m, offset: r/imm] | 2-byte write to memory at `dst`    |
+| `std` src: r, [dst: m, offset: r/imm] | 4-byte write to memory at `dst`    |
+| `stq` src: r, [dst: m, offset: r/imm] | 8-byte write to memory at `dst`    |
+| `ltb` dst: r, [src: m, offset: r/imm] | 1-byte read from memory at `src`   |
+| `ltw` dst: r, [src: m, offset: r/imm] | 2-byte read from memory at `src`   |
+| `ltd` dst: r, [src: m, offset: r/imm] | 4-byte read from memory at `src`   |
+| `ltq` dst: r, [src: m, offset: r/imm] | 8-byte read from memory at `src`   |
+
+#### Example
+```
+/* Set x1 to 7 */
+mov x1, #7
+
+/* Write to memory pointed by sp */
+stq x1, [sp]
+
+/* Write to memory pointed by sp + 8 */
+stq x1, [sp, #8]
+
+/* Write to memory pointed by sp + x2 */
+mov x2, #16
+stq x1, [sp, x2]
+```
+
 ### Arithmetic Instructions
 
 Arithmetic operations can write to all registers except `v0`-`v7`, `x0` and `pc`. Can read from all registers except `v0`-`v7`.
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