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AgeCommit message (Expand)Author
10 daysdocs: Add opcode listmainIan Moffett
10 daysdocs: Introduce Mask Register Over instructionsIan Moffett
12 daysdocs: 'br' and 'brl' should only have register opsIan Moffett
12 daysdocs: Define link registers for OSMX64Ian Moffett
12 daysdocs: Define SR_STATE.CARRY bitIan Moffett
12 daysdocs: Add information on SR_STATE.SUPERVISORIan Moffett
12 daysdocs: Reduce arithmetic operandsIan Moffett
2025-03-28isa: Introduce special registersIan Moffett
2024-07-28Allow indirect loads/storesIan Moffett
2024-07-27Improve naming for load instructionsIan Moffett
2024-07-27write -> store, read -> loadIan Moffett
2024-07-27Fix example with AND instructionIan Moffett
2024-07-27Add data movement instructionsIan Moffett
2024-07-27Add extra operand for arithmetic instructionsIan Moffett
2024-07-27Prefix immediates with '#'Ian Moffett
2024-07-27Terminate code blockKaimakan71
2024-07-27Add copyrightKaimakan71
2024-07-27cpy -> movIan Moffett
2024-07-27Exclude writes to x0 registerIan Moffett
2024-07-27CleanupIan Moffett
2024-07-27Initial commitIan Moffett
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