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diff --git a/emux64/src/include/cpu/cpu.h b/emux64/src/include/cpu/cpu.h
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+/*
+ * Copyright (c) 2025 Ian Marco Moffett and the Osmora Team.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of Hyra nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Description: Virtual CPU definitions
+ * Author: Ian Marco Moffett
+ */
+
+#ifndef CPU_CPU_H
+#define CPU_CPU_H
+
+#include <stdint.h>
+#include <stddef.h>
+#include "memmap.h"
+
+/* Register type counts */
+#define N_GPREG    16
+#define N_FLOATREG 7
+#define N_DUBREG   7
+
+/* OSMX64 Opcodes */
+#define OP_NOP 0x00     /* No-op */
+#define OP_ADD 0x01     /* 2-op ADD */
+#define OP_SUB 0x02     /* 2-op SUB */
+#define OP_MUL 0x03     /* 2-op MUL */
+#define OP_DIV 0x04     /* 2-op DIV */
+#define OP_HLT 0x0E     /* Halt */
+
+/*
+ * X<n> register encoding
+ *
+ * Range: 0x00 - 0xE
+ */
+#define REG_XN_BASE     0x00
+#define REG_XN_LIMIT    (REG_XN_BASE + 0x0E)
+
+/*
+ * Represents a single unit of execution
+ *
+ * @xn: 64-bit X<n> registers
+ * @fn: IEEE 754 single-precision registers
+ * @dn: IEEE 754 double-precision registers
+ * @pc: Program counter
+ * @run: Processor running
+ */
+struct osmx_core {
+    uint64_t xn[N_GPREG];
+    float fn[N_FLOATREG];
+    double dn[N_DUBREG];
+    uintptr_t pc;
+    uint8_t run : 1;
+};
+
+/*
+ * Represents a single (virtual) CPU package,
+ * can have many cores
+ *
+ * TODO: Dynamically allocate cores
+ */
+struct osmx_cpu {
+    struct osmx_core cores[1];
+};
+
+/*
+ * Bring the CPU to an initial reset state
+ *
+ * @core: Core to bring to reset state
+ *
+ * Returns zero on success
+ */
+int cpu_reset(struct osmx_core *core);
+
+/*
+ * Dump the registers to the console for debugging
+ * purposes
+ *
+ * @core: Core to dump
+ */
+void cpu_dump(struct osmx_core *core);
+
+/*
+ * Initialize the registers to use for the
+ * CPU
+ *
+ * @core: Core to use
+ *
+ * Returns zero on success
+ */
+int cpu_run(struct osmx_core *core);
+
+#endif  /* !CPU_CPU_H */