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authorIan Moffett <ian@osmora.org>2024-08-02 21:31:58 -0400
committerIan Moffett <ian@osmora.org>2024-08-02 21:46:59 -0400
commit0b9b18ce30148d447535132deb295e5ce9c608fc (patch)
tree7521b27d2b889a778d1063877be50d94434df326 /sv
parenta2e871d32ebfae07c3c768b0e930f2411f15a958 (diff)
Add PIMC docs
Signed-off-by: Ian Moffett <ian@osmora.org>
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+# Platform Interrupt Message Controller (PIMC)
+
+The PIMC is responsible for receiving Interrupt Requests (IRQs) from peripherals
+and routing them to a processor. There can be several peripherals in the system,
+each connected to their respective IRQ lines.
+
+## PIMC Signals
+
+| Signal | Purpose |
+| ---------- | --------------------------- |
+| IRQACK | Interrupt acknowledgement |
+| LINENO[7:0] | IRQ line to be serviced |
+| NOTIFY# | Signals an active IRQ |
+| CLK | PIMC Clock |
+
+## PIMC Startup State
+
+| Signal | State |
+| ---------- | -------- |
+| IRQACK | LOW (0) |
+| LINENO[7:0] | UNDEFINED |
+| NOTIFY# | UNDEFINED |
+
+## PIMC Initialization Process
+
+During system startup, LINENO[7:0] and NOTIFY# will be in an undefined state. Stage 1 firmware
+is responsible for initializing the PIMC before it is ready for operation. The PIMC is initialized
+by pulsing IRQACK high for exactly one clock cycle. It is recommended that IRQACK should be left high
+for at least 2 ms.
+
+As soon as a rising edge of the PIMC CLK signal occurs with IRQACK pulled high, NOTIFY# is pulled high
+and LINENO[7:0] becomes zero.