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authorIan Moffett <ian@osmora.org>2024-08-04 20:58:18 -0400
committerIan Moffett <ian@osmora.org>2024-08-04 21:20:54 -0400
commitcb00f021981cefe3d0a58fe2020fcf5dcabb3e85 (patch)
tree6827f40187d29bae0ff565712fe3173d919560fd /sv/soc/irq
parent2c90a72e5bc7735c2b4afe5036cad41db33f15e7 (diff)
soc: Add peripheral memory map
Signed-off-by: Ian Moffett <ian@osmora.org>
Diffstat (limited to 'sv/soc/irq')
-rw-r--r--sv/soc/irq/irqchip.md2
-rw-r--r--sv/soc/irq/pimc.sv2
2 files changed, 2 insertions, 2 deletions
diff --git a/sv/soc/irq/irqchip.md b/sv/soc/irq/irqchip.md
index d011e15..7f3ce1a 100644
--- a/sv/soc/irq/irqchip.md
+++ b/sv/soc/irq/irqchip.md
@@ -47,7 +47,7 @@ is pulled high and LINENO[7:0] is cleared to zero.
## MMIO Interface
Some registers within the PIMC chip are memory mapped and can be accessed through the MMIO interface. For example,
-the IRQ table is accessed through physical address 0x1000 + OFFSET.
+the IRQ table is accessed through physical address 0x1000000 + OFFSET.
### MMIO Interface Semantics
diff --git a/sv/soc/irq/pimc.sv b/sv/soc/irq/pimc.sv
index 8bed807..15b82c9 100644
--- a/sv/soc/irq/pimc.sv
+++ b/sv/soc/irq/pimc.sv
@@ -35,7 +35,7 @@
module pimc #(
parameter IRQ_PIN_COUNT = 16,
parameter IRQTAB_ENTSIZE = 32,
- parameter IRQTAB_MMIOBASE = 48'h1000
+ parameter IRQTAB_MMIOBASE = 48'h1000000
) (
input wire clk, /* 50 MHz */
input logic [IRQ_PIN_COUNT-1:0] irq_in,