diff options
| author | Ian Moffett <ian@osmora.org> | 2024-08-03 14:38:54 -0400 |
|---|---|---|
| committer | Ian Moffett <ian@osmora.org> | 2024-08-03 14:38:54 -0400 |
| commit | 04c59c82632e7c6cf45b5fb952364ff39835d513 (patch) | |
| tree | 7bbe8cd6f030c2897c1592e814cfd34d9141167b /sv/soc/irq/irqchip.md | |
| parent | aeda7c0e4749cc13c381653dbd61813b044df4a1 (diff) | |
soc: pimc: Update PIMC IRQACK timing requirements
Signed-off-by: Ian Moffett <ian@osmora.org>
Diffstat (limited to 'sv/soc/irq/irqchip.md')
| -rw-r--r-- | sv/soc/irq/irqchip.md | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/sv/soc/irq/irqchip.md b/sv/soc/irq/irqchip.md index 5faf090..9e9b595 100644 --- a/sv/soc/irq/irqchip.md +++ b/sv/soc/irq/irqchip.md @@ -25,8 +25,7 @@ each connected to their respective IRQ lines. During system startup, LINENO[7:0] and NOTIFY# will be in an undefined state. Stage 1 firmware is responsible for initializing the PIMC before it is ready for operation. The PIMC is initialized -by pulsing IRQACK high for exactly one clock cycle. It is recommended that IRQACK should be left high -for at least 2 ms. +by pulsing IRQACK high for at least 2 ms. As soon as a rising edge of the PIMC CLK signal occurs with IRQACK pulled high, NOTIFY# is pulled high and LINENO[7:0] becomes zero. |