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authorIan Moffett <ian@osmora.org>2025-07-23 19:04:54 -0400
committerIan Moffett <ian@osmora.org>2025-07-23 19:04:54 -0400
commitcc3803f6fffd4506bcac794d381403aefdd8dfa0 (patch)
tree9dbd822a601820a3f2113fdf6305885397efc1d9 /README.md
parentd0f80773522b2dec7c8f314934fecc1b8e203166 (diff)
docs: Introduce Mask Register Over instructions
Introduce 4 new instructions that allow a register to be filled to either 1s or 0s. An example of filling 8-bits of an X<n> register: -- mrob x0, #1 -- An example of filling 16-bits of an X<n> register: -- ! Mrow :3 mrow x0, #1 -- ... Signed-off-by: Ian Moffett <ian@osmora.org>
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@@ -94,11 +94,15 @@ and can be accessed through two special instructions.
Bitwise logic operations can write to all registers except `v0`-`v7`, `x0` and `pc`. Can read from all registers except `v0`-`v7`.
-| Mnemonic | Effect |
-| -------------------------------- | ---------------------- |
-| `and` dst: r, reg: r, val: r/imm | `dst` = `dst` & `val` |
-| `or` dst: r, reg: r, val: r/imm | `dst` = `dst` \| `val` |
-| `xor` dst: r, reg: r, val: r/imm | `dst` = `dst` ^ `val` |
+| Mnemonic | Effect |
+| -------------------------------- | ------------------------------- |
+| `and` dst: r, reg: r, val: r/imm | `dst` = `dst` & `val` |
+| `or` dst: r, reg: r, val: r/imm | `dst` = `dst` \| `val` |
+| `xor` dst: r, reg: r, val: r/imm | `dst` = `dst` ^ `val` |
+| `mrob` dst: r: mask [bit]: imm | Fill byte of 'dst' with 'mask' |
+| `mrow` dst: r: mask [bit]: imm | Fill word of 'dst' with 'mask' |
+| `mrod` dst: r: mask [bit]: imm | Fill dword of 'dst' with 'mask' |
+| `mroq` dst: r: mask [bit]: imm | Fill qword of 'dst' with 'mask' |
#### Example
```