diff options
| author | Ian Moffett <ian@osmora.org> | 2024-08-04 20:58:18 -0400 |
|---|---|---|
| committer | Ian Moffett <ian@osmora.org> | 2024-08-04 21:20:54 -0400 |
| commit | cb00f021981cefe3d0a58fe2020fcf5dcabb3e85 (patch) | |
| tree | 6827f40187d29bae0ff565712fe3173d919560fd | |
| parent | 2c90a72e5bc7735c2b4afe5036cad41db33f15e7 (diff) | |
soc: Add peripheral memory map
Signed-off-by: Ian Moffett <ian@osmora.org>
| -rw-r--r-- | sv/soc/bus/bus.md | 24 | ||||
| -rw-r--r-- | sv/soc/irq/irqchip.md | 2 | ||||
| -rw-r--r-- | sv/soc/irq/pimc.sv | 2 | ||||
| -rw-r--r-- | tb/soc/irq/tb_pimc.cpp | 2 |
4 files changed, 27 insertions, 3 deletions
diff --git a/sv/soc/bus/bus.md b/sv/soc/bus/bus.md new file mode 100644 index 0000000..8179518 --- /dev/null +++ b/sv/soc/bus/bus.md @@ -0,0 +1,24 @@ +# Device Memory Map + +Device memory begins at physical address `0x1000000`, below is a table showing which devices +each range is assigned to. + +| Physical Address | Device | Size (bytes) | +| ---------------- | -------------------------------- | ------------ | +| 0x1000000 | PIMC IRQ Table (pin 0) | 4 | +| 0x1000004 | PIMC IRQ Table (pin 1) | 4 | +| 0x1000008 | PIMC IRQ Table (pin 2) | 4 | +| 0x100000C | PIMC IRQ Table (pin 3) | 4 | +| 0x1000010 | PIMC IRQ Table (pin 4) | 4 | +| 0x1000014 | PIMC IRQ Table (pin 5) | 4 | +| 0x1000018 | PIMC IRQ Table (pin 6) | 4 | +| 0x100001C | PIMC IRQ Table (pin 7) | 4 | +| 0x1000020 | PIMC IRQ Table (pin 8) | 4 | +| 0x1000024 | PIMC IRQ Table (pin 9) | 4 | +| 0x1000028 | PIMC IRQ Table (pin 10) | 4 | +| 0x100002C | PIMC IRQ Table (pin 11) | 4 | +| 0x1000030 | PIMC IRQ Table (pin 12) | 4 | +| 0x1000034 | PIMC IRQ Table (pin 13) | 4 | +| 0x1000038 | PIMC IRQ Table (pin 14) | 4 | +| 0x100003C | PIMC IRQ Table (pin 15) | 4 | +| 0x1000040 | Reserved | 4096 | diff --git a/sv/soc/irq/irqchip.md b/sv/soc/irq/irqchip.md index d011e15..7f3ce1a 100644 --- a/sv/soc/irq/irqchip.md +++ b/sv/soc/irq/irqchip.md @@ -47,7 +47,7 @@ is pulled high and LINENO[7:0] is cleared to zero. ## MMIO Interface Some registers within the PIMC chip are memory mapped and can be accessed through the MMIO interface. For example, -the IRQ table is accessed through physical address 0x1000 + OFFSET. +the IRQ table is accessed through physical address 0x1000000 + OFFSET. ### MMIO Interface Semantics diff --git a/sv/soc/irq/pimc.sv b/sv/soc/irq/pimc.sv index 8bed807..15b82c9 100644 --- a/sv/soc/irq/pimc.sv +++ b/sv/soc/irq/pimc.sv @@ -35,7 +35,7 @@ module pimc #( parameter IRQ_PIN_COUNT = 16, parameter IRQTAB_ENTSIZE = 32, - parameter IRQTAB_MMIOBASE = 48'h1000 + parameter IRQTAB_MMIOBASE = 48'h1000000 ) ( input wire clk, /* 50 MHz */ input logic [IRQ_PIN_COUNT-1:0] irq_in, diff --git a/tb/soc/irq/tb_pimc.cpp b/tb/soc/irq/tb_pimc.cpp index 8b6e294..ec06a5d 100644 --- a/tb/soc/irq/tb_pimc.cpp +++ b/tb/soc/irq/tb_pimc.cpp @@ -70,7 +70,7 @@ int main(int argc, char** argv, char** env) { /* Mask IRQ line 0 */ if (posedge_cnt == 15) { - pimc->mmio_addr = 0x1000; + pimc->mmio_addr = 0x1000000; pimc->mmio_wdata |= (1 << 8); pimc->mmio_we = 1; pimc->mmio_re = 0; |