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authorIan Moffett <ian@osmora.org>2025-07-22 14:38:27 -0400
committerIan Moffett <ian@osmora.org>2025-07-22 14:38:27 -0400
commit548ae74ff2cc056b575ab14a0804404ea20e6d72 (patch)
tree10347102495ee592ac4ee4426c0dba0a66d777f5
parent36cd394c94d4344f551e7a66806700c99891374d (diff)
docs: Define link registers for OSMX64
Signed-off-by: Ian Moffett <ian@osmora.org>
-rw-r--r--README.md15
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@@ -16,6 +16,21 @@ Registers store data which can be accessed at any time. These include special re
| `fp` | 64 bits | Frame pointer |
| `ptp` | 64 bits | Page tree pointer |
+## Link Registers
+
+The link registers are for storing specific return addresses from a subroutine
+
+| Name | Size | Purpose |
+| ---------- | -------- | ---------------------------
+| `blr` | 64 bits | Branch Link Register |
+| `ilr` | 64 bits | Interrupt Link Register |
+
+When calling a subroutine, it will need to know where to return to
+when the execution finishes. To achieve this, we use the branch link
+register (BLR). In situations where an interrupt has occurred on the
+system, the CPU would need to know where to return to from the interrupt
+context, in cases such as this, we'd use the Interrupt Link Register (ILR).
+
### Internal Registers
Only accessed by the CPU for certain instructions. Cannot be directly read/written.