diff options
author | Ian Moffett <ian@osmora.org> | 2024-07-27 20:13:39 -0400 |
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committer | Ian Moffett <ian@osmora.org> | 2024-07-27 20:14:52 -0400 |
commit | 6ceec92cd3c2b390733aa3a795e40eecb4557c77 (patch) | |
tree | 53db54c2f9cd73bff75392b3e57c50b7590c1196 | |
parent | 183d2d138d06ad6427f391360979513107b11d0c (diff) |
Add data movement instructions
Signed-off-by: Ian Moffett <ian@osmora.org>
-rw-r--r-- | README.md | 41 |
1 files changed, 35 insertions, 6 deletions
@@ -31,12 +31,11 @@ Only accessed by the CPU for certain instructions. Cannot be directly read/writt Bitwise logic operations can write to all registers except `v0`-`v7`, `x0` and `pc`. Can read from all registers except `v0`-`v7`. -| Mnemonic | Effect | -| ---------------------------- | ---------------------- | -| `mov` dst: r/m, src: r/m/imm | `dst` = `src` | -| `and` dst: r/m, val: r/m/imm | `dst` = `dst` & `val` | -| `or` dst: r/m, val: r/m/imm | `dst` = `dst` \| `val` | -| `xor` dst: r/m, val: r/m/imm | `dst` = `dst` ^ `val` | +| Mnemonic | Effect | +| -------------------------------- | ---------------------- | +| `and` dst: r, reg: r, val: r/imm | `dst` = `dst` & `val` | +| `or` dst: r, reg: r, val: r/imm | `dst` = `dst` \| `val` | +| `xor` dst: r, reg: r, val: r/imm | `dst` = `dst` ^ `val` | #### Example ``` @@ -47,6 +46,36 @@ and x1, #1 /* x1 now equals 1 */ ``` +### Data Movement Instructions + +| Mnemonic | Effect +| ------------------------------------- | ---------------------------------- | +| `mov` dst: r, src: r/imm | `dst` = `src` | +| `stb` src: r, [dst: m, offset: r/imm] | 1-byte write to memory at `dst` | +| `stw` src: r, [dst: m, offset: r/imm] | 2-byte write to memory at `dst` | +| `std` src: r, [dst: m, offset: r/imm] | 4-byte write to memory at `dst` | +| `stq` src: r, [dst: m, offset: r/imm] | 8-byte write to memory at `dst` | +| `ltb` dst: r, [src: m, offset: r/imm] | 1-byte read from memory at `src` | +| `ltw` dst: r, [src: m, offset: r/imm] | 2-byte read from memory at `src` | +| `ltd` dst: r, [src: m, offset: r/imm] | 4-byte read from memory at `src` | +| `ltq` dst: r, [src: m, offset: r/imm] | 8-byte read from memory at `src` | + +#### Example +``` +/* Set x1 to 7 */ +mov x1, #7 + +/* Write to memory pointed by sp */ +stq x1, [sp] + +/* Write to memory pointed by sp + 8 */ +stq x1, [sp, #8] + +/* Write to memory pointed by sp + x2 */ +mov x2, #16 +stq x1, [sp, x2] +``` + ### Arithmetic Instructions Arithmetic operations can write to all registers except `v0`-`v7`, `x0` and `pc`. Can read from all registers except `v0`-`v7`. |