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authorIan Moffett <ian@osmora.org>2024-07-27 20:42:51 -0400
committerIan Moffett <ian@osmora.org>2024-07-27 20:42:51 -0400
commit2a945cd90616f58cbe68de8b64484c81eacecdd2 (patch)
tree531eded09f13885d6a47eadc3b64946293762094
parent6ceec92cd3c2b390733aa3a795e40eecb4557c77 (diff)
Fix example with AND instruction
Signed-off-by: Ian Moffett <ian@osmora.org>
-rw-r--r--README.md2
1 files changed, 1 insertions, 1 deletions
diff --git a/README.md b/README.md
index 9383f6d..2d41844 100644
--- a/README.md
+++ b/README.md
@@ -42,7 +42,7 @@ Bitwise logic operations can write to all registers except `v0`-`v7`, `x0` and `
/* Set x1 to 5 */
mov x1, #5
/* Ands x1 (which equals 5) with 1 */
-and x1, #1
+and x1, x1, #1
/* x1 now equals 1 */
```