Age | Commit message (Collapse) | Author |
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Introduce register allocation via a bitmap where each bit corresponds to
a specific register index.
Signed-off-by: Ian Moffett <ian@osmora.org>
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Signed-off-by: Ian Moffett <ian@osmora.org>
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Signed-off-by: Ian Moffett <ian@osmora.org>
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This commit introduces support for sending inter-processor interrupts on
the mainbus to other cores on the machine.
Signed-off-by: Ian Moffett <ian@osmora.org>
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Signed-off-by: Ian Moffett <ian@osmora.org>
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Signed-off-by: Ian Moffett <ian@osmora.org>
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Signed-off-by: Ian Moffett <ian@osmora.org>
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Signed-off-by: Ian Moffett <ian@osmora.org>
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Store a trapframe in the process control block so that state may be
saved and restored between contexts
Signed-off-by: Ian Moffett <ian@osmora.org>
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This commit introduces the initial logic for putting process descriptors
in an initialized state. This commit also introduces the process control
block definition.
Signed-off-by: Ian Moffett <ian@osmora.org>
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Signed-off-by: Ian Moffett <ian@osmora.org>
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Signed-off-by: Ian Moffett <ian@osmora.org>
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This commit implements the task state segment and splits up processor
initialization into two seperate stages. The cpu_conf() function is
apart of the first stage and sets up things that should be going by the
time the kernel is started / early init. The cpu_init() function runs
later functions that initialize further platform specific subsystems.
Signed-off-by: Ian Moffett <ian@osmora.org>
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Signed-off-by: Ian Moffett <ian@osmora.org>
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Signed-off-by: Ian Moffett <ian@osmora.org>
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This commit introduces the initial I/O APIC driver code that does basic
initialization i.e., grabbing base address from MADT, masking each pin,
etc.
Signed-off-by: Ian Moffett <ian@osmora.org>
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To avoid interrupt conflicts on some machines with the I/O APIC, disable
the legacy i8259 chip by default
Signed-off-by: Ian Moffett <ian@osmora.org>
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Signed-off-by: Ian Moffett <ian@osmora.org>
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Signed-off-by: Ian Moffett <ian@osmora.org>
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Signed-off-by: Ian Moffett <ian@osmora.org>
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This commit moves the VAS structure into a standard MD layer side and
makes it accessible through a standard MI layer header. This indirection
reduces coupling so that the codebase wont break if a name change or
anything is needed.
Signed-off-by: Ian Moffett <ian@osmora.org>
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Lunos's virtual memory system is split into two parts, the machine
dependent MMU layer and the machine independent layer. The MMU side
exposes a standard bridge header that allows the MI layer to interface
with the MD layer.
Signed-off-by: Ian Moffett <ian@osmora.org>
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Signed-off-by: Ian Moffett <ian@osmora.org>
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This commit implements an interface to allow other parts of Lunos to
talk to the MMU:
- Added the 'vas' structure as the virtual address space
- Added MMU specific prot flags
- Added mmu_map_single() to map pages
- Added mmu_this_vas() to grab the current VAS
...
Signed-off-by: Ian Moffett <ian@osmora.org>
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Signed-off-by: Ian Moffett <ian@osmora.org>
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Signed-off-by: Ian Moffett <ian@osmora.org>
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Signed-off-by: Ian Moffett <ian@osmora.org>
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Signed-off-by: Ian Moffett <ian@osmora.org>
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Signed-off-by: Ian Moffett <ian@osmora.org>
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Signed-off-by: Ian Moffett <ian@osmora.org>
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Signed-off-by: Ian Moffett <ian@osmora.org>
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Signed-off-by: Ian Moffett <ian@osmora.org>
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Signed-off-by: Ian Moffett <ian@osmora.org>
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Signed-off-by: Ian Moffett <ian@osmora.org>
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Signed-off-by: Ian Moffett <ian@osmora.org>
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