From 76b4d4408ec450d8f8a3aee7223b67da1ce0e2cb Mon Sep 17 00:00:00 2001
From: Ian Moffett <ian@osmora.org>
Date: Mon, 15 Sep 2025 13:01:37 -0400
Subject: kernel/amd64: Add task state segment logic

This commit implements the task state segment and splits up processor
initialization into two seperate stages. The cpu_conf() function is
apart of the first stage and sets up things that should be going by the
time the kernel is started / early init. The cpu_init() function runs
later functions that initialize further platform specific subsystems.

Signed-off-by: Ian Moffett <ian@osmora.org>
---
 src/sys/arch/amd64/boot/boot_chip.c | 27 ++++++++++++++++++++++++++-
 1 file changed, 26 insertions(+), 1 deletion(-)

(limited to 'src/sys/arch/amd64/boot/boot_chip.c')

diff --git a/src/sys/arch/amd64/boot/boot_chip.c b/src/sys/arch/amd64/boot/boot_chip.c
index 679a759..8cefdac 100644
--- a/src/sys/arch/amd64/boot/boot_chip.c
+++ b/src/sys/arch/amd64/boot/boot_chip.c
@@ -28,11 +28,15 @@
  */
 
 #include <sys/types.h>
+#include <sys/panic.h>
+#include <sys/cpuvar.h>
 #include <machine/uart.h>
 #include <machine/gdt.h>
 #include <machine/boot.h>
 #include <machine/i8259.h>
 #include <machine/ioapic.h>
+#include <machine/tss.h>
+#include <machine/gdt.h>
 #include <stdbool.h>
 
 static void
@@ -48,12 +52,33 @@ chipset_init(void)
     ioapic_init();
 }
 
+/*
+ * Initialize and load the task state segment
+ */
+static void
+init_tss(struct pcore *pcore)
+{
+    struct tss_desc *desc;
+
+    desc = (struct tss_desc *)&g_gdt_data[GDT_TSS_INDEX];
+    write_tss(pcore, desc);
+    tss_load();
+}
+
 void
 platform_boot(void)
 {
+    struct pcore *core;
+
+    /* Try to get the current core */
+    if ((core = this_core()) == NULL) {
+        panic("platform_boot: could not get core\n");
+    }
+
     gdt_load();
-    i8259_disable();
+    init_tss(core);
 
+    i8259_disable();
     chipset_init();
     uart_init();
 }
-- 
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