From c3fe4c4c4dfb662e65299669147a904585eb5aca Mon Sep 17 00:00:00 2001 From: Ian Moffett Date: Tue, 10 Jun 2025 23:29:17 -0400 Subject: kernel: ahci: Improve port reset logic - Set PxCMD.SUD if the HBA supports staggered spin-up to ensure the device will be detectable. - Wait for the device link to be established - Detect and log SATA link speed Signed-off-by: Ian Moffett --- sys/include/dev/ic/ahciregs.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'sys/include') diff --git a/sys/include/dev/ic/ahciregs.h b/sys/include/dev/ic/ahciregs.h index f959a1e..129ac76 100644 --- a/sys/include/dev/ic/ahciregs.h +++ b/sys/include/dev/ic/ahciregs.h @@ -88,6 +88,7 @@ struct hba_memspace { */ #define AHCI_PXSSTS_DET(SSTS) (SSTS & 0xF) #define AHCI_PXSSTS_IPM(SSTS) ((SSTS >> 8) & 0xF) +#define AHCI_PXSSTS_SPD(SSTS) ((SSTS >> 4) & 0xF) /* * Port SATA control bits @@ -100,6 +101,7 @@ struct hba_memspace { * See section 3.3.7 of the AHCI spec. */ #define AHCI_PXCMD_ST BIT(0) /* Start */ +#define AHCI_PXCMD_SUD BIT(1) /* Spin-up device */ #define AHCI_PXCMD_FRE BIT(4) /* FIS Receive Enable */ #define AHCI_PXCMD_FR BIT(14) /* FIS Receive Running */ #define AHCI_PXCMD_CR BIT(15) /* Command List Running */ @@ -137,6 +139,9 @@ struct hba_memspace { #define AHCI_DET_PRESENT 1 /* Device present (no PHY comm) */ #define AHCI_DET_COMM 3 /* Device present and phy comm established */ #define AHCI_IPM_ACTIVE 1 +#define AHCI_SPD_GEN1 1 /* 1.5 Gb/s */ +#define AHCI_SPD_GEN2 2 /* 3 Gb/s */ +#define AHCI_SPD_GEN3 3 /* 6 Gb/s */ /* * PxSERR bits -- cgit v1.2.3