From f53ac3212fe8f07c99aef348e754aa8ab00081dc Mon Sep 17 00:00:00 2001 From: sigsegv7 Date: Sun, 12 Nov 2023 00:16:24 -0500 Subject: kernel/amd64: lapic: Remove ESR support ESR support should be added later on; there is no need for it as of now... Signed-off-by: sigsegv7 --- sys/arch/amd64/lapic.c | 21 --------------------- 1 file changed, 21 deletions(-) (limited to 'sys/arch') diff --git a/sys/arch/amd64/lapic.c b/sys/arch/amd64/lapic.c index 6f2f6c1..af219d2 100644 --- a/sys/arch/amd64/lapic.c +++ b/sys/arch/amd64/lapic.c @@ -208,27 +208,6 @@ lapic_set_ldr(void) lapic_writel(LAPIC_LDR, LAPIC_STARTUP_LID); } -/* - * Reads the Local APIC error status - * register. Returns the value read. - * - * XXX: It is a good idea to save the value returned as - * each read will clear the register. - */ -static inline uint32_t -lapic_read_esr(void) -{ - /* - * We'll need to write 0 to clear the ESR and reload - * it with any new errors that happened... In xAPIC mode - * we can write anything to do this; however, in x2APIC - * mode, writes of 0 are enforced. We'll only write 0 to - * work both with x2APIC and xAPIC mode... - */ - lapic_writel(LAPIC_ERR, 0); - return lapic_readl(LAPIC_ERR); -} - void lapic_timer_init(size_t *freq_out) { -- cgit v1.2.3