From 60af87ead21331501d3eac54648122f5ec6a4082 Mon Sep 17 00:00:00 2001 From: Ian Moffett Date: Tue, 12 Aug 2025 23:31:41 -0400 Subject: kernel/amd64: conf: Add boolean USER_TSC option Introduce the USER_TSC kernel config option to control whether or not the 'rdtsc' instruction should be accessible in a user context. Signed-off-by: Ian Moffett --- sys/arch/amd64/amd64/tsc.c | 24 ++++++++++++++++++++++++ sys/arch/amd64/conf/GENERIC | 1 + 2 files changed, 25 insertions(+) (limited to 'sys/arch') diff --git a/sys/arch/amd64/amd64/tsc.c b/sys/arch/amd64/amd64/tsc.c index e9070c5..1880821 100644 --- a/sys/arch/amd64/amd64/tsc.c +++ b/sys/arch/amd64/amd64/tsc.c @@ -32,6 +32,14 @@ #include #include #include +#include + +/* See kconf(9) */ +#if defined(__USER_TSC) +#define USER_TSC __USER_TSC +#else +#define USER_TSC 0 +#endif /* __USER_TSC */ #define pr_trace(fmt, ...) kprintf("tsc: " fmt, ##__VA_ARGS__) #define pr_error(...) pr_trace(__VA_ARGS__) @@ -47,8 +55,24 @@ rdtsc_rel(void) static int tsc_init(void) { + uint64_t cr4; + + cr4 = amd64_read_cr4(); tsc_i = rdtsc(); pr_trace("initial count @ %d\n", rdtsc_rel()); + + /* + * If we USER_TSC is configured to "yes" then + * we'll need to enable the 'rdtsc' instruction + * in user mode. + */ + if (!USER_TSC) { + cr4 &= ~CR4_TSD; + } else { + cr4 |= CR4_TSD; + } + + amd64_write_cr4(cr4); return 0; } diff --git a/sys/arch/amd64/conf/GENERIC b/sys/arch/amd64/conf/GENERIC index 6f573f3..9411999 100644 --- a/sys/arch/amd64/conf/GENERIC +++ b/sys/arch/amd64/conf/GENERIC @@ -8,5 +8,6 @@ option SPECTRE_IBRS no // Enable the IBRS CPU feature option SERIAL_DEBUG yes // Enable kmsg serial logging option USER_KMSG no // Show kmsg in user consoles +option USER_TSC no // Enable 'rdtsc' in user mode option CPU_SMEP yes // Supervisor Memory Exec Protection option I8042_POLL yes // Use polling for the i8042 -- cgit v1.2.3