From 8748aef181ba99997022fdd5e2129009f7247644 Mon Sep 17 00:00:00 2001 From: sigsegv7 Date: Wed, 4 Oct 2023 14:51:32 -0400 Subject: kernel/amd64: Set certain cpu_info fields This commit puts certain fields on the cpu_info structure into a known state. Signed-off-by: sigsegv7 --- sys/arch/amd64/lapic.c | 27 ++++++++++++++++++++++++--- 1 file changed, 24 insertions(+), 3 deletions(-) diff --git a/sys/arch/amd64/lapic.c b/sys/arch/amd64/lapic.c index b3809dd..0c4e238 100644 --- a/sys/arch/amd64/lapic.c +++ b/sys/arch/amd64/lapic.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include #include @@ -38,9 +39,6 @@ #include #include -__naked void -__lapic_timer_isr(void); - /* * Only calls KINFO if we are the BSP. */ @@ -159,6 +157,18 @@ lapic_reg_clear(uint32_t reg, uint32_t value) lapic_writel(reg, old & ~(value)); } +/* + * XXX: When adding x2APIC support it is IMPORTANT + * to read the full 32 bits. Unlike standard + * LAPIC mode, where bits 27:24 hold the ID, + * x2APIC mode uses the full 32 bits. + */ +static inline uint32_t +lapic_get_id(void) +{ + return (lapic_readl(LAPIC_ID) >> 24) & 0xF; +} + void lapic_timer_init(size_t *freq_out) { @@ -205,7 +215,9 @@ lapic_set_base(void *mmio_base) void lapic_init(void) { + struct cpu_info *cur_cpu; uint64_t tmp; + size_t tmr_freq; /* Sanity check */ if (lapic_base == NULL) { @@ -237,4 +249,13 @@ lapic_init(void) /* Register the timer for scheduler usage */ register_timer(TIMER_SCHED, &lapic_timer); + + /* Get the current processor, and calibrate LAPIC timer */ + cur_cpu = this_cpu(); + lapic_timer_init(&tmr_freq); + cur_cpu->lapic_tmr_freq = tmr_freq; + + /* Set the Local APIC ID */ + cur_cpu->lapic_id = lapic_get_id(); + BSP_KINFO("BSP Local APIC ID: %d\n", cur_cpu->lapic_id); } -- cgit v1.2.3