summaryrefslogtreecommitdiff
path: root/usr.bin/oemu
AgeCommit message (Collapse)Author
2 daysoemu: cpu: Keep X0 zerored as per the OSMX64 specmainIan Moffett
Ensure that after every instruction, we undo any potential side effects or operations upon the X0 register. The "Registers" section of the OSMX64 spec states that X0 is a 64-bit, always-zero and readonly register. All writes to this register are to be ignored by the processor. Signed-off-by: Ian Moffett <ian@osmora.org>
3 daysoasm: Unreserve 9 opcode gapIan Moffett
Signed-off-by: Ian Moffett <ian@osmora.org>
3 daysoemu: cpu: Add decoding logic of MRO instructionsIan Moffett
Signed-off-by: Ian Moffett <ian@osmora.org>
5 daysoemu: cpu: Decode the BR instructionIan Moffett
Add support for interpreting the BR (branch) instruction. This instruction takes in a single register operand containing an address to reassign the instruction pointer to. Signed-off-by: Ian Moffett <ian@osmora.org>
5 daysoemu: types: Add addr_t typeIan Moffett
The addr_t type represents any kind of memory address. We also assign paddr_t to addr_t. Signed-off-by: Ian Moffett <ian@osmora.org>
5 daysoemu: cpu: Add link registers and SR_STATEIan Moffett
Signed-off-by: Ian Moffett <ian@osmora.org>
5 daysoemu: cpu: Add CPU register dumpIan Moffett
Signed-off-by: Ian Moffett <ian@osmora.org>
5 daysoemu: cpu: Introduce decoding logic for DIVIan Moffett
Signed-off-by: Ian Moffett <ian@osmora.org>
5 daysoemu: cpu: Introduce decoding for MUL instructionIan Moffett
Signed-off-by: Ian Moffett <ian@osmora.org>
5 daysoemu: cpu: Introduce decoding logic for SUBIan Moffett
Signed-off-by: Ian Moffett <ian@osmora.org>
6 daysoemu: cpu: Decode and process HLT instructionIan Moffett
Signed-off-by: Ian Moffett <ian@osmora.org>
6 daysoemu: cpu: Decode ADD instructionsIan Moffett
Signed-off-by: Ian Moffett <ian@osmora.org>
6 daysusr: Add initial OSMX64 emulator sourcesIan Moffett
Signed-off-by: Ian Moffett <ian@osmora.org>
generated by cgit v1.2.3 (git 2.39.1) at 2025-07-27 08:15:07 +0000