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-rw-r--r--usr.bin/oasm/emit.c79
-rw-r--r--usr.bin/oasm/include/oasm/emit.h1
-rw-r--r--usr.bin/oasm/include/oasm/lex.h1
-rw-r--r--usr.bin/oasm/lex.c3
-rw-r--r--usr.bin/oasm/parse.c9
-rw-r--r--usr.bin/oemu/cpu.c32
-rw-r--r--usr.bin/oemu/include/oemu/osmx64.h1
7 files changed, 124 insertions, 2 deletions
diff --git a/usr.bin/oasm/emit.c b/usr.bin/oasm/emit.c
index 4bad76b..cef90d7 100644
--- a/usr.bin/oasm/emit.c
+++ b/usr.bin/oasm/emit.c
@@ -103,7 +103,6 @@ emit_encode_mov(struct emit_state *state, struct oasm_token *tok)
return NULL;
}
-
/* Next token should be an IMM */
tok = TAILQ_NEXT(tok, link);
if (tok == NULL) {
@@ -170,6 +169,77 @@ emit_encode_incdec(struct emit_state *state, struct oasm_token *tok)
return TAILQ_NEXT(tok, link);
}
+/*
+ * Encode an ADD instruction
+ *
+ * add [r], <imm>
+ *
+ * Returns the next token on success,
+ * otherwise NULL.
+ */
+static struct oasm_token *
+emit_encode_add(struct emit_state *state, struct oasm_token *tok)
+{
+ inst_t curinst;
+ reg_t rd;
+
+ /*
+ * The next operand must be an X<n>
+ * register.
+ */
+ tok = TAILQ_NEXT(tok, link);
+ if (tok == NULL) {
+ return NULL;
+ }
+ if (!tok_is_xreg(tok->type)) {
+ oasm_err("[emit error]: bad 'add' order\n");
+ return NULL;
+ }
+
+ /* Get the register and validate it */
+ rd = ir_to_reg(tok->type);
+ if (rd == OSMX64_R_BAD) {
+ oasm_err("[emit error]: got bad reg in 'add'\n");
+ return NULL;
+ }
+
+ /* The next token should be an <imm> */
+ tok = TAILQ_NEXT(tok, link);
+ if (tok == NULL) {
+ return NULL;
+ }
+ if (tok->type != TT_IMM) {
+ oasm_err("[emit error]: expected <imm> in 'add'\n");
+ return NULL;
+ }
+
+ curinst.opcode = OSMX64_ADD;
+ curinst.rd = rd;
+ curinst.imm = tok->imm;
+ emit_bytes(state, &curinst, sizeof(curinst));
+ return TAILQ_NEXT(tok, link);
+}
+
+/*
+ * Encode a HLT instruction
+ *
+ * 'hlt' - no operands
+ *
+ * Returns the next token on success,
+ * otherwise NULL.
+ */
+static struct oasm_token *
+emit_encode_hlt(struct emit_state *state, struct oasm_token *tok)
+{
+ inst_t curinst;
+
+ curinst.opcode = OSMX64_HLT;
+ curinst.rd = 0;
+ curinst.unused = 0;
+ emit_bytes(state, &curinst, sizeof(curinst));
+ return TAILQ_NEXT(tok, link);
+}
+
int
emit_osxm64(struct emit_state *state, struct oasm_token *tp)
{
@@ -248,11 +318,16 @@ emit_process(struct oasm_state *oasm, struct emit_state *emit)
case TT_DEC:
curtok = emit_encode_incdec(emit, curtok);
break;
+ case TT_ADD:
+ curtok = emit_encode_add(emit, curtok);
+ break;
+ case TT_HLT:
+ curtok = emit_encode_hlt(emit, curtok);
+ break;
default:
curtok = TAILQ_NEXT(curtok, link);
break;
}
-
}
return 0;
diff --git a/usr.bin/oasm/include/oasm/emit.h b/usr.bin/oasm/include/oasm/emit.h
index f4b4f77..b0a2fd1 100644
--- a/usr.bin/oasm/include/oasm/emit.h
+++ b/usr.bin/oasm/include/oasm/emit.h
@@ -60,6 +60,7 @@
#define OSMX64_SLL 0x11 /* Shift left logical operation */
#define OSMX64_SRL 0x12 /* Shift right logical operation */
#define OSMX64_MOV_IMM 0x13 /* Data move operation from IMM */
+#define OSMX64_HLT 0x14 /* Halt the processor */
/*
* OSMX64 register definitions
diff --git a/usr.bin/oasm/include/oasm/lex.h b/usr.bin/oasm/include/oasm/lex.h
index 28ad52c..6ffaf79 100644
--- a/usr.bin/oasm/include/oasm/lex.h
+++ b/usr.bin/oasm/include/oasm/lex.h
@@ -95,6 +95,7 @@ typedef enum {
TT_SUB, /* 'sub' */
TT_MUL, /* 'mul' */
TT_DIV, /* 'div' */
+ TT_HLT, /* 'hlt' */
/* Register ops */
TT_MOV, /* 'mov' */
diff --git a/usr.bin/oasm/lex.c b/usr.bin/oasm/lex.c
index f8427e0..b3af2b1 100644
--- a/usr.bin/oasm/lex.c
+++ b/usr.bin/oasm/lex.c
@@ -45,6 +45,7 @@ static char putback = '\0';
#define S_IMN_DIV "div"
#define S_IMN_INC "inc"
#define S_IMN_DEC "dec"
+#define S_IMN_HLT "hlt"
/*
* Returns 0 if a char is counted as a
@@ -179,6 +180,8 @@ token_arith(char *p)
return TT_SUB;
} else if (strcmp(p, S_IMN_DIV) == 0) {
return TT_DIV;
+ } else if (strcmp(p, S_IMN_HLT) == 0) {
+ return TT_HLT;
}
return TT_UNKNOWN;
diff --git a/usr.bin/oasm/parse.c b/usr.bin/oasm/parse.c
index 7a855ca..6851935 100644
--- a/usr.bin/oasm/parse.c
+++ b/usr.bin/oasm/parse.c
@@ -42,6 +42,7 @@ static const char *tokstr[] = {
[ TT_SUB ] = "sub",
[ TT_MUL ] = "mul",
[ TT_DIV ] = "div",
+ [ TT_HLT ] = "hlt",
[ TT_COMMA ] = ",",
[ TT_INC ] = "inc",
[ TT_DEC ] = "dec",
@@ -107,6 +108,7 @@ parse_reg(struct oasm_state *state, struct oasm_token *tok)
case TT_MOV:
case TT_DEC:
case TT_INC:
+ case TT_ADD:
state->last = tok->type;
break;
default:
@@ -139,10 +141,17 @@ parse_tok(struct oasm_state *state, struct oasm_token *tok)
int error;
switch (tok->type) {
+ case TT_HLT:
+ state->last = tok->type;
+ emit_osxm64(&emit_state, tok);
case TT_MOV:
state->last = tok->type;
emit_osxm64(&emit_state, tok);
break;
+ case TT_ADD:
+ state->last = tok->type;
+ emit_osxm64(&emit_state, tok);
+ break;
case TT_DEC:
case TT_INC:
state->last = tok->type;
diff --git a/usr.bin/oemu/cpu.c b/usr.bin/oemu/cpu.c
index 61568f2..8ec106a 100644
--- a/usr.bin/oemu/cpu.c
+++ b/usr.bin/oemu/cpu.c
@@ -100,6 +100,29 @@ cpu_dec(struct oemu_cpu *cpu, inst_t *inst)
}
/*
+ * Decode the INST_ADD instruction
+ *
+ * @cpu: CPU that is executing
+ * @inst: Instruction dword
+ */
+static void
+cpu_add(struct oemu_cpu *cpu, inst_t *inst)
+{
+ struct cpu_regs *regs = &cpu->regs;
+ imm_t imm;
+
+ if (inst->rd > NELEM(regs->xreg)) {
+ printf("bad register operand for 'add'\n");
+ return;
+ }
+
+ imm = regs->xreg[inst->rd];
+ regs->xreg[inst->rd] += inst->imm;
+ printf("%d + %d -> X%d, new=%d\n",
+ imm, inst->imm, inst->rd, regs->xreg[inst->rd]);
+}
+
+/*
* Reset a CPU to a default state
*/
void
@@ -135,6 +158,15 @@ cpu_kick(struct oemu_cpu *cpu, struct sysmem *mem)
case INST_DEC:
cpu_dec(cpu, inst);
break;
+ case INST_ADD:
+ cpu_add(cpu, inst);
+ break;
+ }
+
+ /* Is this a halt instruction? */
+ if (inst->opcode == INST_HLT) {
+ printf("HALTED\n");
+ break;
}
if (regs->ip >= MEMORY_SIZE) {
diff --git a/usr.bin/oemu/include/oemu/osmx64.h b/usr.bin/oemu/include/oemu/osmx64.h
index d7ea8b1..e9baae0 100644
--- a/usr.bin/oemu/include/oemu/osmx64.h
+++ b/usr.bin/oemu/include/oemu/osmx64.h
@@ -47,6 +47,7 @@
#define INST_SLL 0x11 /* Shift left logical operation */
#define INST_SRL 0x12 /* Shift right logical operation */
#define INST_MOV_IMM 0x13 /* Data move operation from IMM */
+#define INST_HLT 0x14 /* Halt */
/* Registers */
#define REG_X0 0x00
generated by cgit v1.2.3 (git 2.39.1) at 2025-07-21 23:43:23 +0000