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-rw-r--r--sys/dev/phy/et131x.c101
-rw-r--r--sys/include/dev/mii/mii.h57
-rw-r--r--sys/include/dev/phy/et131xregs.h8
3 files changed, 156 insertions, 10 deletions
diff --git a/sys/dev/phy/et131x.c b/sys/dev/phy/et131x.c
index 52fac6c..f8a8ed5 100644
--- a/sys/dev/phy/et131x.c
+++ b/sys/dev/phy/et131x.c
@@ -43,6 +43,7 @@
#include <dev/pci/pciregs.h>
#include <dev/phy/et131xregs.h>
#include <dev/timer.h>
+#include <net/if_var.h>
#define VENDOR_ID 0x11C1 /* Agere */
#define DEVICE_ID 0xED00
@@ -50,7 +51,16 @@
#define pr_trace(fmt, ...) kprintf("et131x: " fmt, ##__VA_ARGS__)
#define pr_error(...) pr_trace(__VA_ARGS__)
+/* Helpful constants */
+#define ETHERFRAME_LEN 1518 /* Length of ethernet frame */
+#define ETHER_FCS_LEN 4 /* Length of frame check seq */
+
+struct netcard {
+ struct et131x_iospace *io;
+};
+
static struct pci_device *dev;
+static struct netcard g_card;
static struct timer tmr;
/*
@@ -59,8 +69,9 @@ static struct timer tmr;
* @io: Register space
*/
static void
-et131x_soft_reset(struct et131x_iospace *io)
+et131x_soft_reset(struct netcard *card)
{
+ struct et131x_iospace *io = card->io;
uint32_t tmp;
tmp = (
@@ -99,8 +110,9 @@ et131x_soft_reset(struct et131x_iospace *io)
* @v: Value to write
*/
static int
-et131x_mii_write(struct et131x_iospace *io, uint8_t addr, uint8_t reg, uint16_t v)
+et131x_mii_write(struct netcard *card, uint8_t addr, uint8_t reg, uint16_t v)
{
+ struct et131x_iospace *io = card->io;
uint16_t mii_addr;
uint32_t tmp, mgmt_addr_old;
uint32_t mgmt_cmd_old;
@@ -169,25 +181,96 @@ et131x_init_pci(void)
* @delay: Millisecond delay between blinks
*/
static void
-et131x_blink(struct et131x_iospace *io, uint32_t count, uint16_t delay)
+et131x_blink(struct netcard *card, uint32_t count, uint16_t delay)
{
uint16_t on_val;
on_val = (LED_ON << LED_LINK_SHIFT);
on_val |= (LED_ON << LED_TXRX_SHIFT);
for (uint32_t i = 0; i < count; ++i) {
- et131x_mii_write(io, 0, PHY_LED2, on_val);
+ et131x_mii_write(card, 0, PHY_LED2, on_val);
tmr.msleep(delay);
- et131x_mii_write(io, 0, PHY_LED2, LED_ALL_OFF);
+ et131x_mii_write(card, 0, PHY_LED2, LED_ALL_OFF);
tmr.msleep(delay);
}
}
+/*
+ * Initialize the MAC into a functional
+ * state.
+ *
+ * @io: Register space.
+ */
+static void
+et131x_mac_init(struct netcard *card)
+{
+ struct et131x_iospace *io = card->io;
+ struct mac_regs *mac = &io->mac;
+ struct netif_addr addr;
+ uint32_t ipg_tmp, tmp;
+
+ /*
+ * Okay so we need to reset the card so it doesn't
+ * do undefined bullshit. God forbid we get undefined
+ * behaviour without having a fucking official datasheet.
+ * Most would end themselves right then and there.
+ *
+ * Now, after we've done that, we must ensure that any
+ * packets larger than ETHERFRAME_LEN are truncated by
+ * the MAC. Again, something like an internal buffer
+ * overrun during TX/RX would be quite fucking horrible.
+ *
+ * We also want to clear the MAC interface control and MII
+ * clock to ensure it is in a known state.
+ */
+ et131x_soft_reset(card);
+ mmio_write32(&mac->max_fm_len, ETHERFRAME_LEN);
+ mmio_write32(&mac->if_ctrl, 0);
+ mmio_write32(&mac->mii_mgmt_cfg, MAC_MIIMGMT_CLK_RST);
+
+ /*
+ * Set up half duplex config
+ *
+ * - BEB trunc (0xA)
+ * - Excess defer
+ * - Re-transmit (0xF)
+ * - Collision window
+ */
+ mmio_write32(&mac->hfdp, 0x00A1F037);
+
+ /*
+ * Setup the MAC interpacket gap register
+ *
+ * - IPG1 (0x38)
+ * - IPG2 (0x58)
+ * - B2B (0x60)
+ */
+ ipg_tmp = ((0x50 << 8) | 0x38005860);
+ mmio_write32(&mac->ipg, ipg_tmp);
+
+ /* MAC address dword 0 */
+ tmp = pci_readl(dev, PCI_MAC_ADDRESS);
+ addr.data[0] = tmp & 0xFF;
+ addr.data[1] = (tmp >> 8) & 0xFF;
+ addr.data[2] = (tmp >> 16) & 0xFF;
+ addr.data[3] = (tmp >> 24) & 0xFF;
+
+ /* MAC address word 1 */
+ tmp = pci_readl(dev, PCI_MAC_ADDRESS + 4);
+ addr.data[4] = tmp & 0xFF;
+ addr.data[5] = (tmp >> 8) & 0xFF;
+
+ /* Print out the MAC address */
+ pr_trace("MAC address: %x:%x:%x:%x:%x:%x\n",
+ (uint64_t)addr.data[0], (uint64_t)addr.data[1],
+ (uint64_t)addr.data[2], (uint64_t)addr.data[3],
+ (uint64_t)addr.data[4], (uint64_t)addr.data[5]);
+}
+
static int
et131x_init(void)
{
struct pci_lookup lookup;
- struct et131x_iospace *bar;
int error;
lookup.vendor_id = VENDOR_ID;
@@ -213,13 +296,13 @@ et131x_init(void)
return -ENODEV;
}
- if ((error = pci_map_bar(dev, 0, (void *)&bar)) != 0) {
+ if ((error = pci_map_bar(dev, 0, (void *)&g_card.io)) != 0) {
return error;
}
et131x_init_pci();
- et131x_soft_reset(bar);
- et131x_blink(bar, 4, 150);
+ et131x_mac_init(&g_card);
+ et131x_blink(&g_card, 4, 150);
return 0;
}
diff --git a/sys/include/dev/mii/mii.h b/sys/include/dev/mii/mii.h
new file mode 100644
index 0000000..5d77281
--- /dev/null
+++ b/sys/include/dev/mii/mii.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2023-2025 Ian Marco Moffett and the Osmora Team.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of Hyra nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _DEV_MII_H_
+#define _DEV_MII_H_
+
+#include <sys/param.h>
+
+/*
+ * MII registers
+ */
+#define MII_BMCR 0x00 /* Basic Mode Config */
+#define MII_BMSR 0x01 /* Basic Mode Status */
+#define MII_PHYID 0x02 /* MII PHY identifier 1 */
+#define MII_PHYID2 0x03 /* MII PHY identifier 2 */
+#define MII_ADVER 0x04 /* Auto-negotiation advertisement */
+#define MII_LPA 0x05 /* Link parter abilities */
+#define MII_EXPAN 0x06 /* Auto-negotiation expansion */
+#define MII_ESTATUS 0x0F /* Extended status register */
+#define MII_IRQ 0x1B /* Interrupt control/status */
+
+/*
+ * MII BMCR bits
+ */
+#define MII_BMCR_RST BIT(15) /* PHY reset */
+#define MII_BCMR_LOOP BIT(14) /* Loopback mode enable */
+#define MII_BMCR_ANEN BIT(12) /* Auto-negotiation enable */
+#define MII_PWR_DOWN BIT(11) /* Power down PHY */
+#define MII_ISOLATE BIT(10) /* Electrically isolate PHY from MII */
+
+#endif /* !_DEV_MII_H_ */
diff --git a/sys/include/dev/phy/et131xregs.h b/sys/include/dev/phy/et131xregs.h
index 0e05c94..1f8bfcb 100644
--- a/sys/include/dev/phy/et131xregs.h
+++ b/sys/include/dev/phy/et131xregs.h
@@ -225,9 +225,16 @@ struct mac_regs {
#define MAC_MGMT_BUSY 0x00000001
#define MAC_MGMT_WAIT 0x00000005
+/* MAC management config values */
+#define MAC_MIIMGMT_CLK_RST 0x00007
+
/* LED register defines */
#define PHY_LED2 0x1C
+/* PCI config space offsets */
+#define PCI_EEPROM_STATUS 0xB2
+#define PCI_MAC_ADDRESS 0xA4
+
/*
* LED control register 2 values
*/
@@ -247,7 +254,6 @@ struct mac_regs {
#define LED_TXRX_SHIFT 8
#define LED_LINK_SHIFT 12
-
struct et131x_iospace {
#define _IO_PAD(NAME, REGSET) uint8_t NAME[4096 - sizeof(struct REGSET)]
struct global_regs global;
generated by cgit v1.2.3 (git 2.39.1) at 2025-07-15 04:45:40 +0000