diff options
Diffstat (limited to 'sys/include')
-rw-r--r-- | sys/include/arch/amd64/msr.h | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/sys/include/arch/amd64/msr.h b/sys/include/arch/amd64/msr.h new file mode 100644 index 0000000..e466fe9 --- /dev/null +++ b/sys/include/arch/amd64/msr.h @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2023 Ian Marco Moffett and the VegaOS team. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of VegaOS nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _AMD64_MSR_H_ +#define _AMD64_MSR_H_ + +#include <sys/types.h> +#include <sys/cdefs.h> + +static inline uint64_t +rdmsr(uint32_t msr_addr) +{ + uint32_t lo, hi; + + __ASMV("rdmsr" + : "=a" (lo), "=d" (hi) + : "c" (msr_addr) + ); + return ((uint64_t)hi << 32) | lo; +} + +static inline void +wrmsr(uint32_t msr_addr, uint64_t value) +{ + uint32_t lo, hi; + + lo = (uint32_t)value; + hi = (uint32_t)(value >> 32); + + __ASMV("wrmsr" + : /* No outputs */ + : "a" (lo), "d" (hi), + "c" (msr_addr) + ); +} + +#endif /* _AMD64_MSR_H_ */ |