3 files changed, 75 insertions, 2 deletions
diff --git a/sys/include/arch/amd64/asm.h b/sys/include/arch/amd64/asm.h
index 8d2c812..aca49d2 100644
--- a/sys/include/arch/amd64/asm.h
+++ b/sys/include/arch/amd64/asm.h
@@ -34,6 +34,16 @@
 #include <sys/param.h>
 #include <machine/msr.h>
 
+/* CR4 bits */
+#define CR4_TSD     BIT(2)  /* Timestamp disable */
+#define CR4_DE      BIT(3)  /* Debugging extensions */
+#define CR4_PSE     BIT(4)  /* Page size extensions */
+#define CR4_PCE     BIT(8)  /* Performance monitoring counter enable */
+#define CR4_UMIP    BIT(11) /* User mode instruction prevention */
+#define CR4_LA57    BIT(12) /* Level 5 paging enable */
+#define CR4_VMXE    BIT(13) /* Virtual machine extensions enable */
+#define CR4_SMXE    BIT(14) /* Safer mode extensions enable */
+
 /*
  * Contains information for the current
  * core. Stored in %GS.
diff --git a/sys/include/arch/amd64/cpu.h b/sys/include/arch/amd64/cpu.h
index 4586163..6ed675e 100644
--- a/sys/include/arch/amd64/cpu.h
+++ b/sys/include/arch/amd64/cpu.h
@@ -42,14 +42,22 @@
 #define CPU_IRQ(IRQ_N) (BIT((IRQ_N)) & 0xFF)
 
 /* Feature bits */
-#define CPU_FEAT_SMAP  BIT(0)
-#define CPU_FEAT_SMEP  BIT(1)
+#define CPU_FEAT_SMAP   BIT(0)
+#define CPU_FEAT_SMEP   BIT(1)
+#define CPU_FEAT_UMIP   BIT(2)
+#define CPU_FEAT_TSCINV BIT(3)  /* TSC invariant */
+
+/* CPU vendors */
+#define CPU_VENDOR_OTHER    0x00000000
+#define CPU_VENDOR_INTEL    0x00000001
+#define CPU_VENDOR_AMD      0x00000002
 
 typedef uint16_t ipi_pend_t;
 
 struct cpu_info {
     uint32_t apicid;
     uint32_t feat;
+    uint32_t vendor;            /* Vendor (see CPU_VENDOR_*) */
     uint8_t ipi_dispatch : 1;   /* 1: IPIs being dispatched */
     uint8_t ipi_id;
     ipi_pend_t ipi_pending[N_IPIVEC];
diff --git a/sys/include/arch/amd64/tsc.h b/sys/include/arch/amd64/tsc.h
new file mode 100644
index 0000000..d9eed4f
--- /dev/null
+++ b/sys/include/arch/amd64/tsc.h
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2023-2025 Ian Marco Moffett and the Osmora Team.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of Hyra nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _MACHINE_TSC_H_
+#define _MACHINE_TSC_H_
+
+#include <sys/types.h>
+#include <sys/cdefs.h>
+#include <sys/param.h>
+
+uint64_t rdtsc_rel(void);
+
+__always_inline static inline uint64_t
+rdtsc(void)
+{
+    uint32_t lo, hi;
+
+    __ASMV(
+        "rdtsc"
+        : "=d" (hi),
+          "=a" (lo)
+        :
+        : "memory"
+    );
+
+    return COMBINE32(hi, lo);
+}
+
+#endif  /* !_MACHINE_TSC_H_ */