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-rw-r--r--sys/include/arch/amd64/lapic.h2
-rw-r--r--sys/include/arch/amd64/lapicvar.h17
2 files changed, 7 insertions, 12 deletions
diff --git a/sys/include/arch/amd64/lapic.h b/sys/include/arch/amd64/lapic.h
index 1e7caf6..1ef41fb 100644
--- a/sys/include/arch/amd64/lapic.h
+++ b/sys/include/arch/amd64/lapic.h
@@ -36,6 +36,8 @@
#define LAPIC_TMR_PERIODIC 0x01
void lapic_timer_init(size_t *freq_out);
+void lapic_timer_oneshot(bool mask, uint32_t count);
+void lapic_timer_oneshot_us(uint32_t us);
void lapic_init(void);
#endif /* !_AMD64_LAPIC_H_ */
diff --git a/sys/include/arch/amd64/lapicvar.h b/sys/include/arch/amd64/lapicvar.h
index aad9fa8..43c89a6 100644
--- a/sys/include/arch/amd64/lapicvar.h
+++ b/sys/include/arch/amd64/lapicvar.h
@@ -90,18 +90,11 @@
/* LVT bits */
#define LAPIC_LVT_MASK __BIT(16)
+#define LVT_TMR_ONESHOT 0x00
+#define LVT_TMR_PERIODIC 0x01
+#define LVT_TMR_TSC_DEADLINE 0x02
-/*
- * Local APIC Interrupt stack [IST VALUE].
- *
- * This value should be non-zero and reserved
- * for only 1 interrupt vector to prevent clobbering
- * of the interrupt stacks.
- *
- * XXX TODO: The value is currently 0, however, this needs
- * to be updated to a non-zero value as soon as
- * possible.
- */
-#define LAPIC_TMR_INTSTACK 0
+/* LAPIC timer interrupt stack size in bytes */
+#define LAPIC_TMR_STACKSZ 4096
#endif /* !_AMD64_LAPICVAR_H_ */