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-rw-r--r--sys/arch/amd64/amd64/machdep.c10
-rw-r--r--sys/arch/amd64/conf/GENERIC1
2 files changed, 10 insertions, 1 deletions
diff --git a/sys/arch/amd64/amd64/machdep.c b/sys/arch/amd64/amd64/machdep.c
index 9b65d6e..d310460 100644
--- a/sys/arch/amd64/amd64/machdep.c
+++ b/sys/arch/amd64/amd64/machdep.c
@@ -44,6 +44,8 @@
#include <machine/intr.h>
#include <machine/cdefs.h>
#include <machine/isa/i8042var.h>
+#include <dev/cons/cons.h>
+#include <string.h>
#define pr_trace(fmt, ...) kprintf("cpu: " fmt, ##__VA_ARGS__)
#define pr_error(...) pr_trace(__VA_ARGS__)
@@ -224,6 +226,7 @@ md_backtrace(void)
uintptr_t rip;
off_t off;
const char *name;
+ char line[256];
__ASMV("mov %%rbp, %0" : "=r" (rbp) :: "memory");
while (1) {
@@ -236,7 +239,8 @@ md_backtrace(void)
if (name == NULL)
name = "???";
- kprintf(OMIT_TIMESTAMP "%p @ <%s+0x%x>\n", rip, name, off);
+ snprintf(line, sizeof(line), "%p @ <%s+0x%x>\n", rip, name, off);
+ cons_putstr(&g_root_scr, line, strlen(line));
}
}
@@ -294,6 +298,10 @@ this_cpu(void)
{
struct cpu_info *ci;
+ if (rdmsr(IA32_GS_BASE) == 0) {
+ return NULL;
+ }
+
/*
* This might look crazy but we are just leveraging the "m"
* constraint to add the offset of the self field within
diff --git a/sys/arch/amd64/conf/GENERIC b/sys/arch/amd64/conf/GENERIC
index 44ab8b5..95fe2e0 100644
--- a/sys/arch/amd64/conf/GENERIC
+++ b/sys/arch/amd64/conf/GENERIC
@@ -9,6 +9,7 @@ option SPECTRE_IBRS no // Enable the IBRS CPU feature
option SERIAL_DEBUG yes // Enable kmsg serial logging
option USER_KMSG no // Show kmsg in user consoles
option CPU_SMEP yes // Supervisor Memory Exec Protection
+option PANIC_SCR no // Clear screen on panic
// Kernel constants
setval SCHED_NQUEUE 4 // Number of scheduler queues (for MLFQ)