5 files changed, 66 insertions, 8 deletions

diff --git a/sys/arch/amd64/amd64/intr.c b/sys/arch/amd64/amd64/intr.c
index 685a16d..a545788 100644
--- a/sys/arch/amd64/amd64/intr.c
+++ b/sys/arch/amd64/amd64/intr.c
@@ -129,6 +129,7 @@ intr_register(const char *name, const struct intr_hand *ih)
         ih_new->priority = ih->priority;
         ih_new->irq = ih->irq;
         ih_new->vector = i;
+        ih_new->nintr = 0;
         g_intrs[i] = ih_new;
 
         if (ih->irq >= 0) {
diff --git a/sys/arch/amd64/amd64/machdep.c b/sys/arch/amd64/amd64/machdep.c
index 9b65d6e..40950f9 100644
--- a/sys/arch/amd64/amd64/machdep.c
+++ b/sys/arch/amd64/amd64/machdep.c
@@ -44,6 +44,8 @@
 #include <machine/intr.h>
 #include <machine/cdefs.h>
 #include <machine/isa/i8042var.h>
+#include <dev/cons/cons.h>
+#include <string.h>
 
 #define pr_trace(fmt, ...) kprintf("cpu: " fmt, ##__VA_ARGS__)
 #define pr_error(...) pr_trace(__VA_ARGS__)
@@ -185,9 +187,10 @@ enable_simd(void)
 }
 
 static void
-cpu_check_feat(struct cpu_info *ci)
+cpu_get_info(struct cpu_info *ci)
 {
-    uint32_t unused, ebx;
+    uint32_t eax, ebx, unused;
+    uint8_t ext_model, ext_family;
 
     /* Extended features */
     CPUID(0x07, unused, ebx, unused, unused);
@@ -195,6 +198,33 @@ cpu_check_feat(struct cpu_info *ci)
         ci->feat |= CPU_FEAT_SMEP;
     if (ISSET(ebx, BIT(20)))
         ci->feat |= CPU_FEAT_SMAP;
+
+    /*
+     * Processor info and feature bits
+     */
+    CPUID(0x01, eax, unused, unused, unused);
+    ci->model = (eax >> 4) & 0xF;
+    ci->family = (eax >> 8) & 0xF;
+
+    /*
+     * If the family ID is 15 then the actual family
+     * ID is the sum of the extended family and the
+     * family ID fields.
+     */
+    if (ci->family == 0xF) {
+        ext_family = (eax >> 20) & 0xFF;
+        ci->family += ext_family;
+    }
+
+    /*
+     * If the family has the value of either 6 or 15,
+     * then the extended model number would be used.
+     * Slap them together if this is the case.
+     */
+    if (ci->family == 6 || ci->family == 15) {
+        ext_model = (eax >> 16) & 0xF;
+        ci->model |= (ext_model << 4);
+    }
 }
 
 void
@@ -224,6 +254,7 @@ md_backtrace(void)
     uintptr_t rip;
     off_t off;
     const char *name;
+    char line[256];
 
     __ASMV("mov %%rbp, %0" : "=r" (rbp) :: "memory");
     while (1) {
@@ -236,7 +267,8 @@ md_backtrace(void)
         if (name == NULL)
             name = "???";
 
-        kprintf(OMIT_TIMESTAMP "%p  @ <%s+0x%x>\n", rip, name, off);
+        snprintf(line, sizeof(line), "%p @ <%s+0x%x>\n", rip, name, off);
+        cons_putstr(&g_root_scr, line, strlen(line));
     }
 }
 
@@ -294,6 +326,10 @@ this_cpu(void)
 {
     struct cpu_info *ci;
 
+    if (rdmsr(IA32_GS_BASE) == 0) {
+        return NULL;
+    }
+
     /*
      * This might look crazy but we are just leveraging the "m"
      * constraint to add the offset of the self field within
@@ -375,7 +411,7 @@ cpu_startup(struct cpu_info *ci)
     init_tss(ci);
     try_mitigate_spectre();
 
-    cpu_check_feat(ci);
+    cpu_get_info(ci);
     cpu_enable_smep();
 
     enable_simd();
diff --git a/sys/arch/amd64/amd64/vector.S b/sys/arch/amd64/amd64/vector.S
index c820a41..890b314 100644
--- a/sys/arch/amd64/amd64/vector.S
+++ b/sys/arch/amd64/amd64/vector.S
@@ -51,16 +51,22 @@ ioapic_common_func:
     jz 1f                       // Nope, return
 
     mov (%rdx), %rbx            // intr_hand.func
-    add $8, %rdx                // Get interrupt data
+    add $16, %rdx               // Get interrupt data
     mov %rdx, %rdi              // Pass the interrupt data
     push %rcx                   // Save our counter
+    push %rdx
     call *%rbx                  // Call the handler
+    pop %rdx
     pop %rcx                    // Restore our counter
     or %rax, %rax               // Was it theirs? (RET >= 1)
-    jnz done                    // Yes, we are done.
+    jnz handled                 // Yes, we are done.
 1:  inc %rcx                    // Next
     cmp $256, %rcx              // Did we reach the end?
     jl .walk                    // Nope, keep going
+    jmp done                    // Out of entries
+handled:
+    sub $8, %rdx
+    addq $1, (%rdx)
 done:
     call lapic_eoi
     retq
diff --git a/sys/arch/amd64/conf/GENERIC b/sys/arch/amd64/conf/GENERIC
index 95fe2e0..e407fa9 100644
--- a/sys/arch/amd64/conf/GENERIC
+++ b/sys/arch/amd64/conf/GENERIC
@@ -10,6 +10,7 @@ option SERIAL_DEBUG yes  // Enable kmsg serial logging
 option USER_KMSG    no   // Show kmsg in user consoles
 option CPU_SMEP     yes  // Supervisor Memory Exec Protection
 option PANIC_SCR    no   // Clear screen on panic
+option I8042_POLL   yes  // Use polling for the i8042
 
 // Kernel constants
 setval SCHED_NQUEUE 4    // Number of scheduler queues (for MLFQ)
diff --git a/sys/arch/amd64/isa/i8042.c b/sys/arch/amd64/isa/i8042.c
index cde70ff..3ae645d 100644
--- a/sys/arch/amd64/isa/i8042.c
+++ b/sys/arch/amd64/isa/i8042.c
@@ -53,6 +53,13 @@
 #include <string.h>
 #include <assert.h>
 
+/* From kconf(9) */
+#if !defined(__I8042_POLL)
+#define I8042_POLL 0
+#else
+#define I8042_POLL __I8042_POLL
+#endif
+
 #define KEY_REP_MAX 2
 
 #define pr_trace(fmt, ...) kprintf("i8042: " fmt, ##__VA_ARGS__)
@@ -424,13 +431,20 @@ i8042_init(void)
         quirks |= I8042_HOSTILE;
         pr_trace("ThinkPad T420s detected, assuming hostile\n");
         pr_trace("disabling irq 1, polling as fallback\n");
-        spawn(&polltd, i8042_sync_loop, NULL, 0, NULL);
     }
 
-    if (!ISSET(quirks, I8042_HOSTILE)) {
+    /*
+     * If the i8042 has the hostile quirk or we are
+     * configured to poll for events, spawn the polling
+     * thread.
+     */
+    if (!ISSET(quirks, I8042_HOSTILE) && !I8042_POLL) {
         /* Enable interrupts */
         i8042_drain();
         i8042_en_intr();
+    } else if (ISSET(quirks, I8042_HOSTILE) || I8042_POLL) {
+        spawn(&polltd, i8042_sync_loop, NULL, 0, NULL);
+        pr_trace("polling events\n");
     }
 
     i8042_write(I8042_CMD, I8042_ENABLE_PORT0);