diff options
| -rw-r--r-- | share/docs/hw/et131x.txt | 85 | ||||
| -rw-r--r-- | sys/dev/phy/et131x.c | 10 | ||||
| -rw-r--r-- | sys/include/dev/phy/et131xregs.h | 19 |
3 files changed, 109 insertions, 5 deletions
diff --git a/share/docs/hw/et131x.txt b/share/docs/hw/et131x.txt index e1bc42b..43d7c4f 100644 --- a/share/docs/hw/et131x.txt +++ b/share/docs/hw/et131x.txt @@ -84,6 +84,91 @@ PCI BAR 0. if_stat [dword] (BAR[0] + 0x503C) station_addr1 [dword] (BAR[0] + 0x5040) station_addr2 [dword] (BAR[0] + 0x5044) + NOTES: + [REGISTER INFORMATION] + - cfg1: + First MAC configuration register. + - cfg2: + Second MAC configuration register. + - ipg: + MAC Interpacket Gap configuration register. + - hfdp: + MAC Half Duplex configuration register. + - max_fm_len: + Max packet length (bytes) sent through MAC without + truncation. + - mac_test: + MAC test registers + - mii_mgmt_cfg: + MAC MII Management Config register. + - mii_mgmt_cmd: + MAC MII Management Command register. + - mii_mgmt_ctrl: + MAC MII Management Control register. + - mii_mgmt_stat: + MAC MII Management Status register. + - mii_mgmt_indicator: + MAC MII Management Indicator register. + - if_ctrl: + MAC interface control register. + - station_addr1: + First MAC station address register. + - station_addr2: + Second MAC station address register. + [BITS] + ------------------------------------- + @ cfg1: + [bits 0]: TX enable + [bits 1]: Syncd TX enable + [bits 2]: RX enable + [bits 3]: Syncd TX enable + [bits 4]: TX flow + [bits 5]: RX flow + [bits 7:6]: Reserved + [bits 8]: Loopback + [bits 15:9]: Reserved + [bits 16]: Reset TX func + [bits 17]: Reset RX func + [bits 18]: Reset TX MC + [bits 19]: Reset RX MC + [bits 29:20]: Reserved + [bits 30]: Sim reset + [bits 31]: Soft reset + @ cfg2: + [bits 0]: Full-duplex + [bits 1]: CRC enable + [bits 2]: Pad CRC + [bits 3]: Unused (undefined) + [bits 4]: Length check + [bits 5]: Huge frame + [bits 7:6]: Reserved + [bits 9:8]: Interface mode + [bits 11:10]: Reserved + [bits 15:12]: Preamble + [bits 31:16]: Reserved + @ ipg: + [bits 7:0]: B2B IPG + [bits 15:8]: Minimum IFG enforce + [bits 22:16]: Non B2B IPG 2 + [bits 23]: Unused (undefined) + [bits 30:24]: Non B2B IPG 1 + [bits 31]: Reserved + @ hfdp: + [bits 9:0]: Collision window + [bits 11:10]: Reserved + [bits 15:12]: Re-transmit max + [bits 16]: Excess defer + [bits 17]: No backoff + [bits 18]: BP no backoff + [bits 19]: Alt BEB enable [1] + [bits 23-20]: Alt BEB trunc [1] + [bits 31-24]: Reserved + | + ++ [1]: BEB refers to Binary Exponential Backoff which is + a method to mitigate collisions by doubling the TX + backoff window (throttling TX rate) per collision. + ------------------------------------- + ------------------------------------------------------------------ ET131X REGISTER SPACE NOTES: diff --git a/sys/dev/phy/et131x.c b/sys/dev/phy/et131x.c index c6c588c..52fac6c 100644 --- a/sys/dev/phy/et131x.c +++ b/sys/dev/phy/et131x.c @@ -162,7 +162,7 @@ et131x_init_pci(void) } /* - * Blink the LED of the card + * Blink both LEDs of the card * * @io: Register space * @count: Number of times to blink @@ -171,10 +171,14 @@ et131x_init_pci(void) static void et131x_blink(struct et131x_iospace *io, uint32_t count, uint16_t delay) { + uint16_t on_val; + + on_val = (LED_ON << LED_LINK_SHIFT); + on_val |= (LED_ON << LED_TXRX_SHIFT); for (uint32_t i = 0; i < count; ++i) { - et131x_mii_write(io, 0, PHY_LED2, LED_ON); + et131x_mii_write(io, 0, PHY_LED2, on_val); tmr.msleep(delay); - et131x_mii_write(io, 0, PHY_LED2, LED_OFF); + et131x_mii_write(io, 0, PHY_LED2, LED_ALL_OFF); tmr.msleep(delay); } } diff --git a/sys/include/dev/phy/et131xregs.h b/sys/include/dev/phy/et131xregs.h index 54b81c0..0e05c94 100644 --- a/sys/include/dev/phy/et131xregs.h +++ b/sys/include/dev/phy/et131xregs.h @@ -228,9 +228,24 @@ struct mac_regs { /* LED register defines */ #define PHY_LED2 0x1C -/* LED control register 2 values */ +/* + * LED control register 2 values + */ +#define LED_BLINK 0xD #define LED_ON 0xE -#define LED_OFF 0xFFFF +#define LED_OFF 0xF +#define LED_ALL_OFF 0xFFFF + +/* + * LED register bit-shift constants + * + * Bits [3:0]: 100BASE-T LED + * Bits [7:4]: 100BASE-TX LED + * Bits [11:8]: TX/RX LED + * Bits [15:12]: Link LED + */ +#define LED_TXRX_SHIFT 8 +#define LED_LINK_SHIFT 12 struct et131x_iospace { |