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authorIan Moffett <ian@osmora.org>2025-07-22 15:26:46 -0400
committerIan Moffett <ian@osmora.org>2025-07-22 15:26:46 -0400
commit7a38e4f8aac5cfe7a4503589a2cf8b953295e04b (patch)
tree0f9d835d6027f562821304d6499d9fec9b5f1f83 /usr.bin/oemu/include
parentfc65d46a2f82d54a6a24ea4cde9f4c2e0d0bb1a7 (diff)
oemu: cpu: Decode the BR instruction
Add support for interpreting the BR (branch) instruction. This instruction takes in a single register operand containing an address to reassign the instruction pointer to. Signed-off-by: Ian Moffett <ian@osmora.org>
Diffstat (limited to 'usr.bin/oemu/include')
-rw-r--r--usr.bin/oemu/include/oemu/osmx64.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/usr.bin/oemu/include/oemu/osmx64.h b/usr.bin/oemu/include/oemu/osmx64.h
index e9baae0..b1df5d3 100644
--- a/usr.bin/oemu/include/oemu/osmx64.h
+++ b/usr.bin/oemu/include/oemu/osmx64.h
@@ -48,6 +48,7 @@
#define INST_SRL 0x12 /* Shift right logical operation */
#define INST_MOV_IMM 0x13 /* Data move operation from IMM */
#define INST_HLT 0x14 /* Halt */
+#define INST_BR 0x15 /* Branch */
/* Registers */
#define REG_X0 0x00