kernel: Add PCI driver

Signed-off-by: Ian Moffett <ian@osmora.org>

5 files changed, 330 insertions, 0 deletions

diff --git a/sys/arch/amd64/pci/pci_machdep.c b/sys/arch/amd64/pci/pci_machdep.c
new file mode 100644
index 0000000..fa6e492
--- /dev/null
+++ b/sys/arch/amd64/pci/pci_machdep.c
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2023-2024 Ian Marco Moffett and the Osmora Team.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of Hyra nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/types.h>
+#include <sys/param.h>
+#include <dev/pci/pci.h>
+#include <machine/pio.h>
+
+static inline uint32_t
+pci_conf_addr(struct pci_device *dev, uint32_t offset)
+{
+    return BIT(31)             |
+           (offset & ~3)       |
+           (dev->func << 8)    |
+           (dev->slot << 11)   |
+           (dev->bus << 16);
+}
+
+pcireg_t
+pci_readl(struct pci_device *dev, uint32_t offset)
+{
+    uint32_t address;
+
+    address = pci_conf_addr(dev, offset);
+    outl(0xCF8, address);
+    return inl(0xCFC) >> ((offset & 3) * 8);
+}
+
+void
+pci_writel(struct pci_device *dev, uint32_t offset, pcireg_t val)
+{
+    uint32_t address;
+
+    address = pci_conf_addr(dev, offset);
+    outl(0xCF8, address);
+    outl(0xCFC, val);
+}
diff --git a/sys/dev/acpi/acpi_init.c b/sys/dev/acpi/acpi_init.c
index 4c0ae1b..448c522 100644
--- a/sys/dev/acpi/acpi_init.c
+++ b/sys/dev/acpi/acpi_init.c
@@ -34,6 +34,7 @@
 #include <dev/acpi/acpi.h>
 #include <dev/acpi/tables.h>
 #include <dev/acpi/acpivar.h>
+#include <dev/pci/pci.h>
 #include <vm/vm.h>
 #if defined(__x86_64__)
 #include <machine/hpet.h>
@@ -119,4 +120,5 @@ acpi_init(void)
     root_sdt_entries = (root_sdt->hdr.length - sizeof(root_sdt->hdr)) / 4;
     acpi_init_hpet();
     acpi_init_madt();
+    pci_init();
 }
diff --git a/sys/dev/pci/pci.c b/sys/dev/pci/pci.c
new file mode 100644
index 0000000..680e5ac
--- /dev/null
+++ b/sys/dev/pci/pci.c
@@ -0,0 +1,141 @@
+/*
+ * Copyright (c) 2023-2024 Ian Marco Moffett and the Osmora Team.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of Hyra nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/types.h>
+#include <sys/queue.h>
+#include <sys/syslog.h>
+#include <dev/pci/pci.h>
+#include <dev/pci/pciregs.h>
+#include <vm/dynalloc.h>
+#include <lib/assert.h>
+
+#define pr_trace(fmt, ...) kprintf("pci: " fmt, ##__VA_ARGS__)
+
+static TAILQ_HEAD(, pci_device) device_list;
+
+static bool
+pci_dev_exists(uint8_t bus, uint8_t slot, uint8_t func)
+{
+    uint16_t vendor_id;
+    struct pci_device dev_tmp;
+
+    dev_tmp.bus = bus;
+    dev_tmp.slot = slot;
+    dev_tmp.func = func;
+    vendor_id = pci_readl(&dev_tmp, PCIREG_VENDOR_ID);
+
+    if (vendor_id == 0xFFFF) {
+        return false;
+    }
+
+    return true;
+}
+
+/*
+ * Sets other device information (device id, vendor id, etc)
+ *
+ * @dev: Device descriptor to set up.
+ *
+ * XXX: Expects device bus, slot and func to be set.
+ */
+static void
+pci_set_device_info(struct pci_device *dev)
+{
+    uint32_t classrev;
+
+    dev->vendor_id = pci_readl(dev, PCIREG_VENDOR_ID) & 0xFFFF;
+    dev->device_id = pci_readl(dev, PCIREG_DEVICE_ID) & 0xFFFF;
+    classrev = pci_readl(dev, PCIREG_CLASSREV);
+
+    dev->pci_class = PCIREG_CLASS(classrev);
+    dev->pci_subclass = PCIREG_SUBCLASS(classrev);
+    dev->prog_if = PCIREG_PROGIF(classrev);
+
+    dev->bar[0] = pci_readl(dev, PCIREG_BAR0);
+    dev->bar[1] = pci_readl(dev, PCIREG_BAR1);
+    dev->bar[2] = pci_readl(dev, PCIREG_BAR2);
+    dev->bar[3] = pci_readl(dev, PCIREG_BAR3);
+    dev->bar[4] = pci_readl(dev, PCIREG_BAR4);
+    dev->bar[5] = pci_readl(dev, PCIREG_BAR5);
+
+    dev->irq_line = pci_readl(dev, PCIREG_IRQLINE) & 0xFF;
+}
+
+/*
+ * Attempt to register a device.
+ *
+ * @bus: Device bus number.
+ * @slot: Device slot number.
+ * @func: Device function number.
+ *
+ * This routine also checks if the device is present
+ * and returns early if not.
+ */
+static void
+pci_register_device(uint8_t bus, uint8_t slot, uint8_t func)
+{
+    struct pci_device *dev = NULL;
+
+    if (!pci_dev_exists(bus, slot, func)) {
+        return;
+    }
+
+    dev = dynalloc(sizeof(struct pci_device));
+    __assert(dev != NULL);
+
+    dev->bus = bus;
+    dev->slot = slot;
+    dev->func = func;
+
+    pci_set_device_info(dev);
+    TAILQ_INSERT_TAIL(&device_list, dev, link);
+}
+
+static void
+pci_scan_bus(uint8_t bus)
+{
+    for (int slot = 0; slot < 32; ++slot) {
+        for (int func = 0; func < 8; ++func) {
+            pci_register_device(bus, slot, func);
+        }
+    }
+}
+
+int
+pci_init(void)
+{
+    TAILQ_INIT(&device_list);
+    pr_trace("Scanning each bus...\n");
+
+    for (uint16_t i = 0; i < 256; ++i) {
+        pci_scan_bus(i);
+    }
+
+    return 0;
+}
diff --git a/sys/include/dev/pci/pci.h b/sys/include/dev/pci/pci.h
new file mode 100644
index 0000000..4e2ceec
--- /dev/null
+++ b/sys/include/dev/pci/pci.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2023-2024 Ian Marco Moffett and the Osmora Team.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of Hyra nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _PCI_H_
+#define _PCI_H_
+
+#include <sys/types.h>
+#include <sys/queue.h>
+
+typedef uint32_t pcireg_t;
+
+struct pci_device {
+    uint8_t bus;
+    uint8_t slot;
+    uint8_t func;
+
+    uint16_t device_id;
+    uint16_t vendor_id;
+    uint8_t pci_class;
+    uint8_t pci_subclass;
+    uint8_t prog_if;
+    uintptr_t bar[6];
+    uint8_t irq_line;
+    TAILQ_ENTRY(pci_device) link;
+};
+
+pcireg_t pci_readl(struct pci_device *dev, uint32_t offset);
+void pci_writel(struct pci_device *dev, uint32_t offset, pcireg_t val);
+int pci_init(void);
+
+#endif  /* !_PCI_H_ */
diff --git a/sys/include/dev/pci/pciregs.h b/sys/include/dev/pci/pciregs.h
new file mode 100644
index 0000000..c1b02e9
--- /dev/null
+++ b/sys/include/dev/pci/pciregs.h
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2023-2024 Ian Marco Moffett and the Osmora Team.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of Hyra nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _PCI_PCIREGS_H_
+#define _PCI_PCIREGS_H_
+
+#include <sys/param.h>
+
+#define PCIREG_VENDOR_ID  0x00  /* 16 bits */
+#define PCIREG_DEVICE_ID  0x02  /* 16 bits */
+#define PCIREG_CLASSREV   0x08  /* 32 bits */
+#define PCIREG_BAR0       0x10  /* 32 bits */
+#define PCIREG_BAR1       0x14  /* 32 bits */
+#define PCIREG_BAR2       0x18  /* 32 bits */
+#define PCIREG_BAR3       0x1C  /* 32 bits */
+#define PCIREG_BAR4       0x20  /* 32 bits */
+#define PCIREG_BAR5       0x24  /* 32 bits */
+#define PCIREG_IRQLINE    0x3C  /* 8 bits */
+#define PCIREG_CMDSTATUS  0x04  /* command (15:0), status (31:16) */
+
+/* Macros to extract PCIREG_CLASSREV bits */
+#define PCIREG_CLASS(CLASSREV) (CLASSREV >> 24)
+#define PCIREG_SUBCLASS(CLASSREV) ((CLASSREV >> 16) & 0xFF)
+#define PCIREG_REVID(CLASSREV) (CLASSREV & 0xFF)
+#define PCIREG_PROGIF(CLASSREV) ((CLASSREV >> 8) & 0xFF)
+
+/* Macros to extract PCIREG_CMDSTATUS bits */
+#define PCIREG_COMMAND(CMDSTATUS) (CMDSTATUS & 0xFFFF)
+#define PCIREG_STATUS(CMDSTATUS) (CMDSTATUS >> 16)
+
+/* PCI command register bits */
+#define PCI_IO_SPACE        BIT(0)  /* Respond to I/O space accesses */
+#define PCI_MEM_SPACE       BIT(1)  /* Respond to mem space accesses */
+#define PCI_BUS_MASTERING   BIT(2)  /* Enable bus mastering */
+#define PCI_INT_DISABLE     BIT(10) /* Interrupt disable */
+
+/* PCI status register bits */
+#define PCI_STATUS_CAPLIST  BIT(4)
+#define PCI_STATUS_66MHZ    BIT(5)
+
+#endif  /* _PCI_PCIREGS_H_ */