diff options
| author | Quinn Stephens <quinn@osmora.org> | 2025-02-14 23:35:04 -0500 |
|---|---|---|
| committer | Ian Moffett <ian@osmora.org> | 2025-02-15 01:11:00 -0500 |
| commit | 6f74de54f35042fa03e5e8626065de9998a88ea6 (patch) | |
| tree | 03bae3bbc09514d292a635fa228f9a722e428d71 /sys/include/dev | |
| parent | 03607899759b4b8315a618ecb4af66c710fffb7e (diff) | |
kernel: pci: Optimize PCI bus scanning
Uses recursive bus/bridge scanning, skips nonexistent devices, and only
scans for multiple functions on multifunction devices. This may result
in PCI scanning being up to 100x as fast.
Signed-off-by: Quinn Stephens <quinn@osmora.org>
Signed-off-by: Ian Moffett <ian@osmora.org>
Diffstat (limited to 'sys/include/dev')
| -rw-r--r-- | sys/include/dev/pci/pci.h | 7 | ||||
| -rw-r--r-- | sys/include/dev/pci/pciregs.h | 11 |
2 files changed, 18 insertions, 0 deletions
diff --git a/sys/include/dev/pci/pci.h b/sys/include/dev/pci/pci.h index b5bb32c..8118cee 100644 --- a/sys/include/dev/pci/pci.h +++ b/sys/include/dev/pci/pci.h @@ -60,8 +60,15 @@ struct pci_device { uint8_t pci_class; uint8_t pci_subclass; uint8_t prog_if; + uint8_t hdr_type; + + uint8_t pri_bus; + uint8_t sec_bus; + uint8_t sub_bus; + uintptr_t bar[6]; uint8_t irq_line; + TAILQ_ENTRY(pci_device) link; }; diff --git a/sys/include/dev/pci/pciregs.h b/sys/include/dev/pci/pciregs.h index f0ed4d2..888d12f 100644 --- a/sys/include/dev/pci/pciregs.h +++ b/sys/include/dev/pci/pciregs.h @@ -35,8 +35,10 @@ #define PCIREG_VENDOR_ID 0x00 /* 16 bits */ #define PCIREG_DEVICE_ID 0x02 /* 16 bits */ #define PCIREG_CLASSREV 0x08 /* 32 bits */ +#define PCIREG_HDRTYPE 0x0e /* 8 bits */ #define PCIREG_BAR0 0x10 /* 32 bits */ #define PCIREG_BAR1 0x14 /* 32 bits */ +#define PCIREG_BUSES 0x18 /* 24 bits */ #define PCIREG_BAR2 0x18 /* 32 bits */ #define PCIREG_BAR3 0x1C /* 32 bits */ #define PCIREG_BAR4 0x20 /* 32 bits */ @@ -51,6 +53,11 @@ #define PCIREG_REVID(CLASSREV) (CLASSREV & 0xFF) #define PCIREG_PROGIF(CLASSREV) ((CLASSREV >> 8) & 0xFF) +/* Macros to extract PCI_BUSES bits */ +#define PCIREG_PRIBUS(BUSES) (BUSES & 0xFF) +#define PCIREG_SECBUS(BUSES) ((BUSES >> 8) & 0xFF) +#define PCIREG_SUBBUS(BUSES) ((BUSES >> 16) & 0xFF) + /* Macros to extract PCIREG_CMDSTATUS bits */ #define PCIREG_COMMAND(CMDSTATUS) (CMDSTATUS & 0xFFFF) #define PCIREG_STATUS(CMDSTATUS) (CMDSTATUS >> 16) @@ -74,4 +81,8 @@ #define PCI_BAR_32(BAR) (PCI_BAR_TYPE(BAR) == 0x0) #define PCI_BAR_64(BAR) (PCI_BAR_TYPE(BAR) == 0x2) +/* PCI header types */ +#define PCI_HDRTYPE_NORMAL 0x00 +#define PCI_HDRTYPE_BRIDGE 0x01 + #endif /* _PCI_PCIREGS_H_ */ |