Clean out for expt

Signed-off-by: Ian Moffett <ian@osmora.org>

3 files changed, 0 insertions, 568 deletions

diff --git a/sys/include/dev/ic/ahciregs.h b/sys/include/dev/ic/ahciregs.h
deleted file mode 100644
index b2da5b7..0000000
--- a/sys/include/dev/ic/ahciregs.h
+++ /dev/null
@@ -1,142 +0,0 @@
-/*
- * Copyright (c) 2023-2024 Ian Marco Moffett and the Osmora Team.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- *    this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of Hyra nor the names of its
- *    contributors may be used to endorse or promote products derived from
- *    this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef _AHCIREGS_H_
-#define _AHCIREGS_H_
-
-#include <sys/types.h>
-#include <sys/cdefs.h>
-
-struct hba_port {
-    volatile uint64_t clb;      /* Command list base (1k-byte aligned) */
-    volatile uint64_t fb;       /* FIS base (256-byte aligned) */
-    volatile uint32_t is;       /* Interrupt status */
-    volatile uint32_t ie;       /* Interrupt enable */
-    volatile uint32_t cmd;      /* Command and status */
-    volatile uint32_t rsvd0;    /* Reserved */
-    volatile uint32_t tfd;      /* Task file data */
-    volatile uint32_t sig;      /* Signature */
-    volatile uint32_t ssts;     /* SATA status */
-    volatile uint32_t sctl;     /* SATA control */
-    volatile uint32_t serr;     /* SATA error */
-    volatile uint32_t sact;     /* SATA active */
-    volatile uint32_t ci;       /* Command issue */
-    volatile uint32_t sntf;     /* SATA notification */
-    volatile uint32_t fbs;      /* FIS-based switch control */
-    volatile uint32_t rsvd1[11];
-    volatile uint32_t vendor[4];
-};
-
-struct hba_memspace {
-    volatile uint32_t cap;          /* Host Capabilities */
-    volatile uint32_t ghc;          /* Global host control */
-    volatile uint32_t is;           /* Interrupt status */
-    volatile uint32_t pi;           /* Ports implemented */
-    volatile uint32_t vs;           /* Version */
-    volatile uint32_t ccc_ctl;      /* Command completion coalescing control */
-    volatile uint32_t ccc_pts;      /* Command completion coalescing ports */
-    volatile uint32_t em_loc;       /* Enclosure management location */
-    volatile uint32_t em_ctl;       /* Enclosure management control */
-    volatile uint32_t cap2;         /* Host capabilities extended */
-    volatile uint32_t bohc;         /* BIOS/OS Handoff Control and Status */
-    volatile uint8_t rsvd[0x74];    /* Reserved */
-    volatile uint8_t vendor[0x60];  /* Vendor specific */
-    struct hba_port ports[1];
-};
-
-/* Global host control bits */
-#define AHCI_GHC_AE __BIT(31)   /* AHCI enable */
-#define AHCI_GHC_IE __BIT(1)    /* Interrupt enable */
-#define AHCI_GHC_HR __BIT(0)    /* HBA reset */
-
-/* AHCI port signatures */
-#define AHCI_SIG_ATA    0x00000101
-#define AHCI_SIG_SEMB   0xC33C0101
-#define AHCI_SIG_PM     0x96690101
-
-/*
- * Port SATA status
- * See section 3.3.10 of the AHCI spec.
- */
-#define AHCI_PXSSTS_DET(SSTS) (SSTS & 0xF)
-#define AHCI_PXSSTS_IPM(SSTS) ((SSTS >> 8) & 0xF)
-
-/*
- * Port SATA control bits
- * See section 3.3.11 of the AHCI spec.
- */
-#define AHCI_PXSCTL_DET(SCTL) (SCTL & 0xF)
-
-/*
- * Port command and status bits
- * See section 3.3.7 of the AHCI spec.
- */
-#define AHCI_PXCMD_ST   __BIT(0)    /* Start */
-#define AHCI_PXCMD_FRE  __BIT(4)    /* FIS Receive Enable */
-#define AHCI_PXCMD_FR   __BIT(14)   /* FIS Receive Running  */
-#define AHCI_PXCMD_CR   __BIT(15)   /* Command List Running */
-
-/*
- * Interrupt status bits
- * See section 3.3.5 of the AHCI spec.
- */
-#define AHCI_PXIS_TFES __BIT(31)
-
-/*
- * Task file data bits
- * See section 3.3.8 of the AHCI spec.
- */
-#define AHCI_PXTFD_ERR __BIT(0)
-#define AHCI_PXTFD_DRQ __BIT(3)
-#define AHCI_PXTFD_BSY __BIT(7)
-
-/*
- * Capability bits
- * See section 3.1.1 of the AHCI spec.
- */
-#define AHCI_CAP_NP(CAP) (CAP & 0x1F)           /* Number of ports */
-#define AHCI_CAP_NCS(CAP) ((CAP >> 8) & 0x1F)   /* Number of command slots */
-
-/*
- * Device detection (DET) and Interface power
- * management (IPM) values
- * See section 3.3.10 of the AHCI spec.
- */
-#define AHCI_DET_NULL       0   /* No device detected */
-#define AHCI_DET_PRESENT    1   /* Device present (no PHY comm) */
-#define AHCI_DET_COMM       3   /* Device present and phy comm established */
-#define AHCI_IPM_ACTIVE     1
-
-/*
- * Device detection initialization values
- * See section 3.3.11 of the AHCI spec.
- */
-#define AHCI_DET_COMRESET 1
-
-#endif  /* !_AHCIREGS_H_ */
diff --git a/sys/include/dev/ic/ahcivar.h b/sys/include/dev/ic/ahcivar.h
deleted file mode 100644
index edef4f6..0000000
--- a/sys/include/dev/ic/ahcivar.h
+++ /dev/null
@@ -1,146 +0,0 @@
-/*
- * Copyright (c) 2023-2024 Ian Marco Moffett and the Osmora Team.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- *    this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of Hyra nor the names of its
- *    contributors may be used to endorse or promote products derived from
- *    this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef _AHCIVAR_H_
-#define _AHCIVAR_H_
-
-#include <sys/types.h>
-#include <sys/cdefs.h>
-#include <sys/mutex.h>
-#include <sys/queue.h>
-#include <dev/ic/ahciregs.h>
-
-struct ata_identity {
-    uint16_t rsvd0      : 1;
-    uint16_t unused0    : 1;
-    uint16_t incomplete : 1;
-    uint16_t unused1    : 3;
-    uint16_t fixed_dev  : 1;
-    uint16_t removable  : 1;
-    uint16_t unused2    : 7;
-    uint16_t device_type : 1;
-    uint16_t ncylinders;
-    uint16_t specific_config;
-    uint16_t nheads;
-    uint16_t unused3[2];
-    uint16_t sectors_per_track;
-    uint16_t vendor[3];
-    char serial_number[20];
-    uint16_t unused4[2];
-    uint16_t unused5;
-    char firmware_rev[8];
-    char model_number[40];
-    char pad[256];
-};
-
-/* Physical region descriptor table entry */
-struct ahci_prdt_entry {
-    uintptr_t dba;          /* Data base address */
-    uint32_t rsvd0;         /* Reserved */
-    uint32_t dbc : 22;      /* Count */
-    uint16_t rsvd1 : 9;     /* Reserved */
-    uint8_t i : 1;          /* Interrupt on completion */
-};
-
-/* Command header */
-struct ahci_cmd_hdr {
-    uint8_t cfl : 5;            /* Command FIS length */
-    uint8_t a   : 1;            /* ATAPI */
-    uint8_t w   : 1;            /* Write */
-    uint8_t p   : 1;            /* Prefetchable */
-    uint8_t r   : 1;            /* Reset */
-    uint8_t c   : 1;            /* Clear busy upon R_OK */
-    uint8_t rsvd0 : 1;          /* Reserved */
-    uint8_t pmp   : 4;          /* Port multiplier port */
-    uint16_t prdtl;             /* PRDT length (in entries) */
-    volatile uint32_t prdbc;    /* PRDT bytes transferred count */
-    uintptr_t ctba;             /* Command table descriptor base addr */
-    uint32_t rsvd1[4];          /* Reserved */
-};
-
-/* Command table */
-struct ahci_cmdtab {
-    uint8_t cfis[64];
-    uint8_t acmd[16];
-    uint8_t rsvd[48];
-    struct ahci_prdt_entry prdt[1];
-};
-
-struct ahci_fis_h2d {
-    uint8_t type;
-    uint8_t pmp : 4;
-    uint8_t rsvd0 : 3;
-    uint8_t c : 1;
-    uint8_t command;
-    uint8_t featurel;
-    uint8_t lba0;
-    uint8_t lba1;
-    uint8_t lba2;
-    uint8_t device;
-    uint8_t lba3;
-    uint8_t lba4;
-    uint8_t lba5;
-    uint8_t featureh;
-    uint8_t countl;
-    uint8_t counth;
-    uint8_t icc;
-    uint8_t control;
-    uint8_t rsvd1[4];
-};
-
-struct ahci_device {
-    struct ahci_hba *hba;
-    struct hba_port *port;
-    dev_t minor;
-    TAILQ_ENTRY(ahci_device) link;
-};
-
-struct ahci_hba {
-    struct hba_memspace *abar;
-    struct ahci_cmd_hdr *cmdlist;
-    uint32_t ncmdslots;
-    uint32_t nports;
-};
-
-/* Commands */
-#define ATA_CMD_NOP         0x00
-#define ATA_CMD_IDENTIFY    0xEC
-#define ATA_CMD_READ_DMA    0x25
-#define ATA_CMD_WRITE_DMA   0x35
-
-/* FIS types */
-#define FIS_TYPE_H2D 0x27
-#define FIS_TYPE_D2H 0x34
-
-#define AHCI_TIMEOUT 500
-#define AHCI_FIS_SIZE 256
-#define AHCI_CMDTAB_SIZE 256
-#define AHCI_CMDENTRY_SIZE 32
-
-#endif  /* !_AHCIVAR_H_ */
diff --git a/sys/include/dev/ic/nvmevar.h b/sys/include/dev/ic/nvmevar.h
deleted file mode 100644
index 4a40071..0000000
--- a/sys/include/dev/ic/nvmevar.h
+++ /dev/null
@@ -1,280 +0,0 @@
-/*
- * Copyright (c) 2023-2024 Ian Marco Moffett and the Osmora Team.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- *    this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of Hyra nor the names of its
- *    contributors may be used to endorse or promote products derived from
- *    this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef _IC_NVMEVAR_H_
-#define _IC_NVMEVAR_H_
-
-#include <sys/cdefs.h>
-
-/* Admin commands */
-#define NVME_OP_CREATE_IOSQ     0x01
-#define NVME_OP_CREATE_IOCQ     0x05
-#define NVME_OP_IDENTIFY        0x06
-
-/* I/O commands */
-#define NVME_OP_WRITE 0x01
-#define NVME_OP_READ 0x02
-
-/* Controller Capabilities */
-#define CAP_MPSMIN(caps) ((caps >> 48) & 0xF)
-#define CAP_MPSMAX(caps) ((caps >> 52) & 0xF)
-#define CAP_TIMEOUT(caps) ((caps >> 24) & 0xFF)
-#define CAP_STRIDE(caps) ((caps >> 32) & 0xF)
-#define CAP_MQES(caps) (caps & 0xFFFF)
-#define CAP_CSS(caps) (caps & 0xFF)
-
-/* Controller Configuration */
-#define CONFIG_EN   __BIT(0)
-#define CONFIG_CSS_SHIFT 4
-#define CONFIG_IOSQES_SHIFT 16
-#define CONFIG_IOCQES_SHIFT 20
-
-#define COMMAND_SIZE 64     /* In bytes (defined by spec) */
-#define STATUS_READY(status) (status & 1)
-
-struct nvme_common_cmd {
-    uint8_t opcode;
-    uint8_t flags;
-    uint16_t cid;
-    uint32_t nsid;
-    uint32_t cdw1[2];
-    uint64_t metadata;
-    uint64_t prp1;
-    uint64_t prp2;
-    uint32_t cdw2[6];
-};
-
-struct nvme_identify_cmd {
-    uint8_t opcode;
-    uint8_t flags;
-    uint16_t cid;
-    uint32_t nsid;
-    uint64_t unused1;
-    uint64_t unused2;
-    uint64_t prp1;
-    uint64_t prp2;
-    uint32_t cns;
-    uint32_t unused3[5];
-};
-
-/* Read/write */
-struct nvme_rw_cmd {
-    uint8_t opcode;
-    uint8_t flags;
-    uint16_t cid;
-    uint32_t nsid;
-    uint64_t unused;
-    uint64_t metadata;
-    uint64_t prp1;
-    uint64_t prp2;
-    uint64_t slba;
-    uint16_t len;
-    uint16_t control;
-    uint32_t dsmgmt;
-    uint32_t ref;
-    uint16_t apptag;
-    uint16_t appmask;
-};
-
-/* Create I/O completion queue */
-struct nvme_create_iocq_cmd {
-    uint8_t opcode;
-    uint8_t flags;
-    uint16_t cid;
-    uint32_t unused1[5];
-    uint64_t prp1;
-    uint64_t unused2;
-    uint16_t qid;
-    uint16_t qsize;
-    uint16_t qflags;
-    uint16_t irqvec;
-    uint64_t unused3[2];
-};
-
-struct nvme_create_iosq_cmd {
-    uint8_t opcode;
-    uint8_t flags;
-    uint16_t cid;
-    uint32_t unused1[5];
-    uint64_t prp1;
-    uint64_t unused2;
-    uint16_t sqid;
-    uint16_t qsize;
-    uint16_t qflags;
-    uint16_t cqid;
-    uint64_t unused3[2];
-};
-
-struct nvme_cmd {
-    union {
-        struct nvme_identify_cmd identify;
-        struct nvme_common_cmd common;
-        struct nvme_create_iocq_cmd create_iocq;
-        struct nvme_create_iosq_cmd create_iosq;
-        struct nvme_rw_cmd rw;
-    };
-};
-
-struct nvme_id {
-    uint16_t vid;
-    uint16_t ssvid;
-    char sn[20];
-    char mn[40];
-    char fr[8];
-    uint8_t rab;
-    uint8_t ieee[3];
-    uint8_t mic;
-    uint8_t mdts;
-    uint16_t ctrlid;
-    uint32_t version;
-    uint32_t unused1[43];
-    uint16_t oacs;
-    uint8_t acl;
-    uint8_t aerl;
-    uint8_t fw;
-    uint8_t lpa;
-    uint8_t elpe;
-    uint8_t npss;
-    uint8_t avscc;
-    uint8_t apsta;
-    uint16_t wctemp;
-    uint16_t cctemp;
-    uint16_t unused2[121];
-    uint8_t sqes;
-    uint8_t cqes;
-    uint16_t unused3;
-    uint32_t nn;
-    uint16_t oncs;
-    uint16_t fuses;
-    uint8_t fna;
-    uint8_t vwc;
-    uint16_t awun;
-    uint16_t awupf;
-    uint8_t nvscc;
-    uint8_t unused4;
-    uint16_t acwu;
-    uint16_t unused5;
-    uint32_t sgls;
-    uint32_t unused6[1401];
-    uint8_t vs[1024];
-};
-
-/* Command completion queue entry */
-struct nvme_cq_entry {
-    uint32_t res;
-    uint32_t unused;
-    uint16_t sqhead;
-    uint16_t sqid;
-    uint16_t cid;
-    uint16_t status;
-};
-
-/* NVMe controller */
-struct __packed nvme_bar {
-    uint64_t caps;
-    uint32_t version;
-    uint32_t intms;     /* Interrupt mask set */
-    uint32_t intmc;     /* Interrupt mask clear */
-    uint32_t config;
-    uint32_t unused1;
-    uint32_t status;
-    uint32_t unused2;
-    uint32_t aqa;       /* Admin queue attributes */
-    uint64_t asq;       /* Admin submission queue */
-    uint64_t acq;       /* Admin completion queue */
-};
-
-struct nvme_lbaf {
-    uint16_t ms;    /* Number of metadata bytes per LBA */
-    uint8_t ds;     /* Data size */
-    uint8_t rp;
-};
-
-/* Identify namespace data */
-struct nvme_id_ns {
-    uint64_t size;
-    uint64_t capabilities;
-    uint64_t nuse;
-    uint8_t features;
-    uint8_t nlbaf;
-    uint8_t flbas;
-    uint8_t mc;
-    uint8_t dpc;
-    uint8_t dps;
-    uint8_t nmic;
-    uint8_t rescap;
-    uint8_t fpi;
-    uint8_t unused1;
-    uint16_t nawun;
-    uint16_t nawupf;
-    uint16_t nacwu;
-    uint16_t nabsn;
-    uint16_t nabo;
-    uint16_t nabspf;
-    uint16_t unused2;
-    uint64_t nvmcap[2];
-    uint64_t unusued3[5];
-    uint8_t nguid[16];
-    uint8_t eui64[8];
-    struct nvme_lbaf lbaf[16];
-    uint64_t unused3[24];
-    uint8_t vs[3712];
-};
-
-struct nvme_queue {
-    struct nvme_cmd *sq;        /* Submission queue */
-    struct nvme_cq_entry *cq;   /* Completion queue */
-    uint16_t sq_head;           /* Submission queue head */
-    uint16_t sq_tail;           /* Submission queue tail */
-    uint16_t cq_head;           /* Completion queue head */
-    uint8_t cq_phase : 1;       /* Completion queue phase bit */
-    uint16_t size;              /* Size in elements */
-    volatile uint32_t *sq_db;   /* Submission doorbell */
-    volatile uint32_t *cq_db;   /* Completion doorbell */
-};
-
-struct nvme_state {
-    struct nvme_queue adminq;
-    struct nvme_bar *bar;
-    dev_t major;
-};
-
-/* NVMe namespace */
-struct nvme_ns {
-    size_t nsid;                /* Namespace ID */
-    size_t lba_bsize;           /* LBA block size */
-    size_t size;                /* Size in logical blocks */
-    struct nvme_queue ioq;      /* I/O queue */
-    struct nvme_lbaf lba_fmt;   /* LBA format */
-    struct nvme_state *cntl;    /* NVMe controller */
-    dev_t dev_id;
-    TAILQ_ENTRY(nvme_ns) link;
-};
-
-#endif