kernel/amd64: intr: Add splraise/splx support

Signed-off-by: Ian Moffett <ian@osmora.org>

3 files changed, 33 insertions, 1 deletions

diff --git a/sys/include/arch/amd64/asm.h b/sys/include/arch/amd64/asm.h
index d7334fe..e85dd87 100644
--- a/sys/include/arch/amd64/asm.h
+++ b/sys/include/arch/amd64/asm.h
@@ -85,6 +85,20 @@ amd64_write_cr0(uint64_t val)
 }
 
 static inline uint64_t
+amd64_read_cr8(void)
+{
+    uint64_t cr8;
+    __ASMV("mov %%cr8, %0" : "=r" (cr8) :: "memory");
+    return cr8;
+}
+
+static inline void
+amd64_write_cr8(uint64_t val)
+{
+    __ASMV("mov %0, %%cr8" :: "r" (val) : "memory");
+}
+
+static inline uint64_t
 amd64_read_cr4(void)
 {
     uint64_t cr4;
diff --git a/sys/include/arch/amd64/cpu.h b/sys/include/arch/amd64/cpu.h
index b5420a6..16936e9 100644
--- a/sys/include/arch/amd64/cpu.h
+++ b/sys/include/arch/amd64/cpu.h
@@ -38,6 +38,7 @@
 struct cpu_info {
     uint32_t apicid;
     uint8_t has_x2apic : 1;
+    uint8_t ipl;
     size_t lapic_tmr_freq;
     struct tss_entry *tss;
     struct proc *curtd;
diff --git a/sys/include/arch/amd64/intr.h b/sys/include/arch/amd64/intr.h
index 3f0da77..af5edf2 100644
--- a/sys/include/arch/amd64/intr.h
+++ b/sys/include/arch/amd64/intr.h
@@ -36,6 +36,23 @@
 #define IST_HW_IRQ  2U
 #define IST_SW_INT  3U
 
-int intr_alloc_vector(void);
+/* Upper 4 bits of interrupt vector */
+#define IPL_SHIFT 4
+
+/*
+ * Interrupt priority levels
+ */
+#define IPL_NONE    0   /* Don't defer anything */
+#define IPL_BIO     1   /* Block I/O */
+#define IPL_CLOCK   2   /* Clock */
+#define IPL_HIGH    3   /* Defer everything */
+
+struct intr_entry {
+    int priority;
+};
+
+int intr_alloc_vector(const char *name, uint8_t priority);
+void splraise(uint8_t s);
+void splx(uint8_t s);
 
 #endif