kernel: sched: Add initial sched related code

Signed-off-by: Ian Moffett <ian@osmora.org>

3 files changed, 70 insertions, 1 deletions

diff --git a/sys/include/arch/amd64/cpu.h b/sys/include/arch/amd64/cpu.h
index 37ad69d..c72c106 100644
--- a/sys/include/arch/amd64/cpu.h
+++ b/sys/include/arch/amd64/cpu.h
@@ -33,7 +33,10 @@
 #include <sys/types.h>
 #include <sys/cdefs.h>
 #include <sys/spinlock.h>
+#include <sys/sched_state.h>
+#include <sys/queue.h>
 #include <machine/tss.h>
+#include <machine/msr.h>
 
 #define this_cpu()      amd64_this_cpu()
 #define get_bsp()       amd64_get_bsp()
@@ -52,7 +55,10 @@ struct cpu_info {
     /* Per-arch fields  */
     void *pmap;                         /* Current pmap */
     uint32_t id;
+    uint32_t idx;
     struct spinlock lock;
+    struct sched_state sched_state;
+    TAILQ_ENTRY(cpu_info) link;
 
     /* AMD64 */
     volatile size_t lapic_tmr_freq;
@@ -62,6 +68,16 @@ struct cpu_info {
 };
 
 /*
+ * Contains information for the current
+ * core. Stored in %GS.
+ *
+ * MUST REMAIN IN ORDER!!!
+ */
+struct cpu_ctx {
+    struct cpu_info *ci;
+};
+
+/*
  * Returns true for this core if maskable
  * interrupts are masked (CLI) and false if
  * they aren't (STI).
@@ -75,6 +91,18 @@ amd64_is_intr_mask(void)
     return __TEST(flags, 1 << 9);
 }
 
+static inline void
+write_gs_base(uintptr_t val)
+{
+    wrmsr(IA32_KERNEL_GS_BASE, val);
+}
+
+static inline uintptr_t
+read_gs_base(void)
+{
+    return rdmsr(IA32_KERNEL_GS_BASE);
+}
+
 struct cpu_info *amd64_this_cpu(void);
 struct cpu_info *amd64_get_bsp(void);
 
diff --git a/sys/include/arch/amd64/cpu_mp.h b/sys/include/arch/amd64/cpu_mp.h
new file mode 100644
index 0000000..4047f3b
--- /dev/null
+++ b/sys/include/arch/amd64/cpu_mp.h
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2023-2024 Ian Marco Moffett and the Osmora Team.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of Hyra nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _SYS_CPU_AP_H_
+#define _SYS_CPU_AP_H_
+
+#include <machine/cpu.h>
+#include <sys/cdefs.h>
+#include <sys/types.h>
+
+__weak void ap_bootstrap(struct cpu_info *ci);
+__weak bool mp_supported(void);
+
+#endif  /* !_SYS_CPU_AP_H_ */
diff --git a/sys/include/arch/amd64/msr.h b/sys/include/arch/amd64/msr.h
index 64a790c..d36548b 100644
--- a/sys/include/arch/amd64/msr.h
+++ b/sys/include/arch/amd64/msr.h
@@ -33,7 +33,8 @@
 #include <sys/types.h>
 #include <sys/cdefs.h>
 
-#define IA32_SPEC_CTL   0x00000048
+#define IA32_SPEC_CTL       0x00000048
+#define IA32_KERNEL_GS_BASE 0xC0000102
 
 static inline uint64_t
 rdmsr(uint32_t msr_addr)