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authorIan Moffett <ian@osmora.org>2024-06-04 13:41:11 -0400
committerIan Moffett <ian@osmora.org>2024-06-04 13:45:31 -0400
commit98ccb3a2d41015b42d46d8b382decc755a003c3f (patch)
tree4e514830880a4deabebb60c38055792695314ae6 /sys/include/arch/amd64/msr.h
project: Initial commit
Signed-off-by: Ian Moffett <ian@osmora.org>
Diffstat (limited to 'sys/include/arch/amd64/msr.h')
-rw-r--r--sys/include/arch/amd64/msr.h63
1 files changed, 63 insertions, 0 deletions
diff --git a/sys/include/arch/amd64/msr.h b/sys/include/arch/amd64/msr.h
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+++ b/sys/include/arch/amd64/msr.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2023-2024 Ian Marco Moffett and the Osmora Team.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of Hyra nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _MACHINE_MSR_H_
+#define _MACHINE_MSR_H_
+
+#define IA32_SPEC_CTL 0x00000048
+#define IA32_KERNEL_GS_BASE 0xC0000102
+
+static inline uint64_t
+rdmsr(uint32_t msr_addr)
+{
+ uint32_t lo, hi;
+
+ __ASMV("rdmsr"
+ : "=a" (lo), "=d" (hi)
+ : "c" (msr_addr)
+ );
+ return ((uint64_t)hi << 32) | lo;
+}
+
+static inline void
+wrmsr(uint32_t msr_addr, uint64_t value)
+{
+ uint32_t lo, hi;
+
+ lo = (uint32_t)value;
+ hi = (uint32_t)(value >> 32);
+
+ __ASMV("wrmsr"
+ : /* No outputs */
+ : "a" (lo), "d" (hi),
+ "c" (msr_addr)
+ );
+}
+
+#endif /* !_MACHINE_MSR_H_ */