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authorIan Moffett <ian@osmora.org>2024-02-04 22:57:58 -0500
committerIan Moffett <ian@osmora.org>2024-02-04 22:58:32 -0500
commit2efd4670416be5bcc64782745b745d2183c8ca11 (patch)
treeacc5d76ce5af864086c156ce40a529b292ab368a /sys/include/arch/amd64/lapicvar.h
parent3d36c14c83e96370d423f65a8914dff196c3e10a (diff)
kernel/amd64: lapic: Add support for sending IPIs
Signed-off-by: Ian Moffett <ian@osmora.org>
Diffstat (limited to 'sys/include/arch/amd64/lapicvar.h')
-rw-r--r--sys/include/arch/amd64/lapicvar.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/sys/include/arch/amd64/lapicvar.h b/sys/include/arch/amd64/lapicvar.h
index 2743be8..84f73d2 100644
--- a/sys/include/arch/amd64/lapicvar.h
+++ b/sys/include/arch/amd64/lapicvar.h
@@ -47,6 +47,8 @@
#define LAPIC_TMR 0x0180U /* Trigger Mode Register (max=0x0220) */
#define LAPIC_IRR 0x0200U /* Interrupt Request Register (max=0x0270) */
#define LAPIC_ERR 0x0280U /* Error Status Register */
+#define LAPIC_ICRLO 0x0300U /* Interrupt Command Low Register */
+#define LAPIC_ICRHI 0x0310U /* Interrupt Command High Register */
#define LAPIC_LVT_TMR 0x0320U /* LVT Timer Register */
#define LAPIC_DCR 0x03E0U /* Divide Configuration Register (for timer) */
#define LAPIC_INIT_CNT 0x0380U /* Initial Count Register (for timer) */