diff options
| author | sigsegv7 <ian@vegaa.systems> | 2023-10-18 18:22:48 -0400 |
|---|---|---|
| committer | sigsegv7 <ian@vegaa.systems> | 2023-10-18 18:24:15 -0400 |
| commit | b184afe98009836e31f2daa7dcb5fba211c453e1 (patch) | |
| tree | 445d1fbf417a4c68f15d080d196b6d31cce4e6d2 /sys/include/arch/amd64/lapicvar.h | |
| parent | d42c2061e1b8abb7ddaf628b6016e7a1ad8eedb0 (diff) | |
kernel/amd64: lapic: Add ESR reading logic
Signed-off-by: sigsegv7 <ian@vegaa.systems>
Diffstat (limited to 'sys/include/arch/amd64/lapicvar.h')
| -rw-r--r-- | sys/include/arch/amd64/lapicvar.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/sys/include/arch/amd64/lapicvar.h b/sys/include/arch/amd64/lapicvar.h index 6c2c37f..2ad1a09 100644 --- a/sys/include/arch/amd64/lapicvar.h +++ b/sys/include/arch/amd64/lapicvar.h @@ -91,4 +91,10 @@ /* LVT bits */ #define LAPIC_LVT_MASK __BIT(16) +/* Possible error bits within ESR */ +#define ESR_REDIR_IPI __BIT(4) /* Redirectible IPI */ +#define ESR_SIV __BIT(5) /* Send Illegal Vector */ +#define ESR_RIV __BIT(6) /* Received Illegal Vector */ +#define ESR_IRA __BIT(7) /* Illegal Register Address */ + #endif /* !_AMD64_LAPICVAR_H_ */ |