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authorsigsegv7 <ian@vegaa.systems>2023-09-14 00:22:21 -0400
committersigsegv7 <ian@vegaa.systems>2023-09-14 00:22:21 -0400
commit3a72a201448fe16657a14cfc5916b672df94acf0 (patch)
treeff0f71e02fd2791b85f7791ab6ec98a0c58bf743 /sys/include/arch/amd64/ioapicvar.h
parentec0809d472d0f79420b7e0cebc32a01b93aeff39 (diff)
kernel/amd64: Introduce initial I/O APIC support
Signed-off-by: sigsegv7 <ian@vegaa.systems>
Diffstat (limited to 'sys/include/arch/amd64/ioapicvar.h')
-rw-r--r--sys/include/arch/amd64/ioapicvar.h57
1 files changed, 57 insertions, 0 deletions
diff --git a/sys/include/arch/amd64/ioapicvar.h b/sys/include/arch/amd64/ioapicvar.h
new file mode 100644
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+++ b/sys/include/arch/amd64/ioapicvar.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2023 Ian Marco Moffett and the VegaOS team.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of VegaOS nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _IOAPICVAR_H_
+#define _IOAPICVAR_H_
+
+#include <sys/types.h>
+
+/* Register offsets */
+#define IOREGSEL 0x00
+#define IOWIN 0x10
+#define IOAPICVER 0x01
+#define IOREDTBL 0x10
+
+union ioapic_redentry {
+ struct {
+ uint8_t vector;
+ uint8_t delmod : 3;
+ uint8_t destmod : 1;
+ uint8_t delivs : 1;
+ uint8_t intpol : 1;
+ uint8_t remote_irr : 1;
+ uint8_t trigger_mode : 1;
+ uint8_t interrupt_mask : 1;
+ uint64_t reserved : 39;
+ uint8_t dest_field;
+ };
+ uint64_t value;
+};
+
+#endif /* _IOAPICVAR_H_ */